SC16C750IA44,512 NXP Semiconductors, SC16C750IA44,512 Datasheet - Page 8

IC UART 64BYTE 44PLCC

SC16C750IA44,512

Manufacturer Part Number
SC16C750IA44,512
Description
IC UART 64BYTE 44PLCC
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SC16C750IA44,512

Number Of Channels
1, UART
Fifo's
64 Byte
Voltage - Supply
2.5V, 3.3V, 5V
With Auto Flow Control
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Package / Case
44-PLCC
Voltage
2.25 V ~ 5.5 V
Transmit Fifo
64Byte
Receive Fifo
64Byte
Transmitter And Receiver Fifo Counter
Yes
Package Type
PLCC
Operating Supply Voltage (max)
5.5V
Mounting
Surface Mount
Pin Count
44
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant
Other names
935270053512
SC16C750IA44
SC16C750IA44

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SC16C750IA44,512
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Philips Semiconductors
Table 2:
[1]
9397 750 11623
Product data
Symbol
TXRDY
V
V
IOW, IOW
XTAL1
XTAL2
CC
SS
In sleep mode, XTAL2 is left floating.
[1]
Pin description
Pin
PLCC44 LQFP64
27
44
22
20, 21
18
19
13
40
8
4, 6
1
2
…continued
Type
O
Power 2.5 V, 3 V or 5 V supply voltage.
Power Ground voltage.
I
I
O
Description
Transmitter ready. Transmitter DMA signaling is available with TXRDY.
When operating in the FIFO mode, one of two types of DMA signaling can
be selected using FCR[3]. When operating in the 16C450 mode, only DMA
mode 0 is allowed. Mode 0 supports single-transfer DMA in which a transfer
is made between CPU bus cycles. Mode 1 supports multi-transfer DMA in
which multiple transfers are made continuously until the transmit FIFO has
been filled.
Write inputs. When either IOW or IOW is active (LOW or HIGH,
respectively) and while the UART is selected, the CPU is allowed to write
control words or data into a selected UART register. Only one of these
inputs is required to transfer data during a write operation; the other input
should be tied to its inactive level (i.e., IOW tied LOW or IOW tied HIGH).
Crystal connection or External clock input.
Crystal connection or the inversion of XTAL1 if XTAL1 is driven.
Rev. 04 — 20 June 2003
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
UART with 64-byte FIFO
SC16C750
8 of 45

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