78P2351-IGTR/F Maxim Integrated Products, 78P2351-IGTR/F Datasheet - Page 5

• Manufacturer Part Number: 78P2351-IGTR/F
• Description: LINE INTERFACE UNIT 100-LQFP
• Manufacturer: Maxim Integrated Products

Specifications of 78P2351-IGTR/F

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Design Guidelines for TERIDIAN 78P235x LIUs
DIGITAL TRACES AND TERMINATIONS
Common board design practices should be applied in the routing of high-speed clock traces. Preferably keep
these signals on the top layer and their length comparable to their associated data path. Its also good practice to
keep clock routes away from the analog side of the LIU as well as it’s associated analog signal routes.
Series source termination is recommended on the parallel (nibble) interface and single-ended clocks. The
termination resistor is placed close to the source driver device. The impedance of the termination resistor, in
combination with the AC output impedance of the source driver, should match the associated trace impedance.
Note the output impedance of the LIU is about 30Ω. The LIU source series termination for a 75Ω trace should
therefore be about 45Ω. This is only appropriate however for a single point to point route, since ideal signal
characteristics only appear at the end point of the signal route. Series termination must not be used for multi-
destination clock routes. External clock distribution buffers or parallel termination should be used for multi-
destination clock routes.
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CMOS Digital Input (CI,CIT,CID)
transmitting
CMOS Digital Output (CO,COZ)
from
chip
from circuit
Rsrc
30
75 ohm
75 ohm
75 ohm
235x IC
 2008 Teridian Semiconductor Corp.
Figure 6: CMOS Outputs
Figure 7: CMOS Inputs
PCB
< 2"
< 2"
< 2"
< 2"
PCB
Type CI
Type CIT
Type CID
235x IC
40
10k
VCC
75 ohm
< 40"
10k
10k
receiving
chip
to
to gates
to gates
to gates
Rev 2.1