MCIMX31LCVMN4C Freescale Semiconductor, MCIMX31LCVMN4C Datasheet - Page 85

IC MPU MAP I.MX31L 473-MAPBGA

MCIMX31LCVMN4C

Manufacturer Part Number
MCIMX31LCVMN4C
Description
IC MPU MAP I.MX31L 473-MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX31r
Datasheets

Specifications of MCIMX31LCVMN4C

Core Processor
ARM11
Core Size
32-Bit
Speed
400MHz
Connectivity
1-Wire, ATA, EBI/EMI, FIR, I²C, MMC/SD, PCMCIA, SIM, SPI, SSI, UART/USART, USB, USB OTG
Peripherals
DMA, LCD, POR, PWM, WDT
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.22 V ~ 3.3 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
473-MAPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Program Memory Size
-
Data Converters
-

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1
2
3
The interface is meant to be used with synchronous SIM cards. This means that the SIM module provides
a clock for the SIM card to use. The frequency of this clock is normally 372 times the data rate on the
TX/RX pins, however SIM module can work with CLK equal to 16 times the data rate on TX/RX pins.
There is no timing relationship between the clock and the data. The clock that the SIM module provides
to the aim card will be used by the SIM card to recover the clock from the data much like a standard UART.
All six (or 5 in case bi directional TXRX is used) of the pins for each half of the SIM module are
asynchronous to each other.
There are no required timing relationships between the signals in normal mode, but there are some in two
specific cases: reset and power down sequences.
4.3.20.1 General Timing Requirements
Figure 72
4.3.20.2 Reset Sequence
4.3.20.2.1
The sequence of reset for this kind of SIM Cards is as follows (see
Freescale Semiconductor
Num
50% duty cycle clock
With C = 50pF
With C = 50pF
1
2
3
4
After powerup, the clock signal is enabled on SGCLK (time T0)
After 200 clock cycles, RX must be high.
The card must send a response on RX acknowledging the reset between 400 and 40000 clock
cycles after T0.
SIM Clock Frequency (CLK)
SIM CLK Rise Time
SIM CLK Fall Time
SIM Input Transition Time (RX, SIMPD)
shows the timing of the SIM module, and
Cards with Internal Reset
CLK
Description
3
Table 54. SIM Timing Specification—High Drive Strength
2
1
MCIMX31C/MCIMX31LC Technical Data, Rev. 4.3
Figure 72. SIM Clock Timing Diagram
Sfall
Symbol
S
S
S
S
trans
Figure 54
freq
rise
fall
1/Sfreq
Srise
lists the timing parameters.
0.01
Min
Figure
73):
5 (Some new cards
may reach 10)
Electrical Characteristics
Max
20
20
25
MHz
Unit
ns
ns
ns
85

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