TL072ID STMicroelectronics, TL072ID Datasheet

IC OP AMP JFET DUAL LNOISE 8SOIC

TL072ID

Manufacturer Part Number
TL072ID
Description
IC OP AMP JFET DUAL LNOISE 8SOIC
Manufacturer
STMicroelectronics
Datasheets

Specifications of TL072ID

Amplifier Type
J-FET
Number Of Circuits
2
Slew Rate
16 V/µs
Gain Bandwidth Product
4MHz
Current - Input Bias
20pA
Voltage - Input Offset
3000µV
Current - Supply
1.4mA
Current - Output / Channel
40mA
Voltage - Supply, Single/dual (±)
6 V ~ 36 V, ±3 V ~ 18 V
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Number Of Channels
2
Common Mode Rejection Ratio (min)
80 dB
Input Offset Voltage
10 mV
Input Bias Current (max)
200 pA
Supply Current
2.5 mA
Maximum Power Dissipation
680 mW
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Dual Supply Voltage
+/- 5 V, +/- 9 V, +/- 12 V, +/- 15 V
Maximum Dual Supply Voltage
+/- 18 V
Minimum Dual Supply Voltage
+/- 3 V
Mounting Style
SMD/SMT
Shutdown
No
Technology
BiFET
Voltage Gain Db
106.02 dB
Bandwidth
4 MHz
Channel Separation
120
Common Mode Rejection Ratio
86
Current, Input Bias
20 pA
Current, Input Offset
5 pA
Current, Output
20 mA
Current, Supply
1.4 mA
Harmonic Distortion
0.01 %
Number Of Amplifiers
Dual
Package Type
SO-8
Resistance, Input
10^12 Ohms
Signal Gain
200 V/mV
Temperature, Operating, Range
-40 to +105 °C
Time, Rise
0.1 μs
Voltage, Input
±15 V
Voltage, Noise
15 nV/sqrt Hz
Voltage, Offset
3 mV
Voltage, Supply
6 to 36 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Output Type
-
-3db Bandwidth
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Features
Description
The TL072, TL072A and TL072B are high speed
JFET input dual operational amplifiers
incorporating well matched, high voltage JFET
and bipolar transistors in a monolithic integrated
circuit.
The devices feature high slew rates, low input
bias and offset current, and low offset voltage
temperature coefficient.
July 2008
Wide common-mode (up to V
differential voltage range
Low input bias and offset current
Low noise e
Output short-circuit protection
High input impedance JFET input stage
Low harmonic distortion: 0.01% (typical)
Internal frequency compensation
Latch-up free operation
High slew rate: 16 V/µs (typ)
n
= 15 nV/√Hz (typ)
CC
+
) and
Low noise JFET dual operational amplifiers
Rev 6
TL072 TL072A TL072B
1
2
3
4
Pin connections (top view)
1 - Output 1
2 - Inverting input 1
3 - Non-inverting input 1
4 - V
5 - Non-inverting input 2
6 -Inverting input 2
7 - Output 2
8 - V
(Plastic micropackage)
+
-
(Plastic package)
CC
CC
-
+
SO-8
DIP8
N
D
+
-
www.st.com
8
7
6
5
1/16
16

Related parts for TL072ID

TL072ID Summary of contents

Page 1

Features ■ Wide common-mode ( differential voltage range ■ Low input bias and offset current ■ Low noise nV/√Hz (typ) n ■ Output short-circuit protection ■ High input impedance JFET input stage ■ Low harmonic ...

Page 2

Schematic diagram 1 Schematic diagram Figure 1. Schematic diagram V CC Non-inverting input Inverting input 1.3k 35k V CC 2/16 Ω Ω Ω 30k Ω 1.3k 35k TL072 ...

Page 3

TL072 TL072A TL072B 2 Absolute maximum ratings and operating conditions Table 1. Absolute maximum ratings Symbol V Supply voltage CC V Input voltage in V Differential input voltage id Thermal resistance junction to ambient R SO-8 thja DIP8 Thermal resistance ...

Page 4

Electrical characteristics 3 Electrical characteristics Table 3. Electrical characteristics at V Symbol Parameter Input offset voltage ( +25°C amb TL072 TL072A TL072B V io ≤ T ≤ min amb max TL072 TL072A TL072B DV Input offset ...

Page 5

TL072 TL072A TL072B Table 3. Electrical characteristics at V (continued) Symbol Parameter Output voltage swing T = +25°C amb R = 2kΩ L ± 10kΩ opp L ≤ T ≤ min amb max R = 2kΩ ...

Page 6

Electrical characteristics Figure 2. Maximum peak-to-peak output voltage versus frequency Figure 4. Maximum peak-to-peak output voltage versus frequency Figure 6. Maximum peak-to-peak output voltage versus load resistance 6/16 TL072 TL072A TL072B Figure 3. Maximum peak-to-peak output voltage versus frequency Figure ...

Page 7

TL072 TL072A TL072B Figure 8. Input bias current versus free air temperature 100 V 15V = 0.1 0.01 -50 - TEMPERATURE (˚C) Figure 10. Large signal differential voltage amplification and phase shift versus frequency W ...

Page 8

Electrical characteristics Figure 14. Voltage follower large signal pulse response Figure 16. Equivalent input noise voltage versus frequency 100 400 1k FREQUENCY (Hz) 8/16 Figure ...

Page 9

TL072 TL072A TL072B 4 Parameter measurement information Figure 18. Voltage follower Figure 19. Gain-of-10 inverting amplifier 10k Ω 1k Ω 1/2 TL072 R L Parameter measurement information 100pF L 9/16 ...

Page 10

Typical application 5 Typical application Figure 20. 100 kHz quadruple oscillator 88.4k Ω * These resistor values may be adjusted for a symmetrical output 10/16 18pF - 88.4k Ω 1/2 - TL072 TL072 6 sin ω t 18pF 88.4k Ω ...

Page 11

... JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an STMicroelectronics trademark. ECOPACK specifications are available at: www.st.com. Package information ...

Page 12

Package information 6.1 DIP8 package information Figure 21. DIP8 package mechanical drawing Table 4. DIP8 package mechanical data Ref 12/16 Dimensions Millimeters Min. Typ. Max. 5.33 0.38 ...

Page 13

TL072 TL072A TL072B 6.2 SO-8 package information Figure 22. SO-8 package mechanical drawing Table 5. SO-8 package mechanical data Ref ccc Dimensions Millimeters Min. Typ. Max. 1.75 0.10 ...

Page 14

... Ordering information 7 Ordering information Table 6. Order codes Order code Temperature range TL072IN TL072AIN TL072BIN TL072ID -40°C, +105°C TL072IDT TL072AID TL072AIDT TL072BID TL072BIDT TL072CN TL072ACN TL072BCN TL072CD TL072CDT TL072ACD TL072ACDT TL072BCD TL072BCDT (1) TL072IYD/DT (1) TL072AIYD/DT -40°C, +105°C (1) TL072BIYD/DT 1. Qualification and characterization according to AEC Q100 and Q003 or equivalent, advanced screening according to AEC Q001 & ...

Page 15

TL072 TL072A TL072B 8 Revision history Table 7. Document revision history Date 28-Mar-2001 02-Apr-2004 04-Dec-2006 06-Mar-2007 13-Mar-2008 15-Jul-2008 Revision 1 Initial release. 2 Correction to pin connection diagram on cover page. Unpublished. 3 Modified graphics in package mechanical data. Expanded ...

Page 16

... Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...

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