SAK-C161JC-LF CA Infineon Technologies, SAK-C161JC-LF CA Datasheet - Page 41
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SAK-C161JC-LF CA
Manufacturer Part Number
SAK-C161JC-LF CA
Description
IC MCU 16BIT 256KB TQFP-128-2
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet
1.SAK-C161CS-LF_CA.pdf
(89 pages)
Specifications of SAK-C161JC-LF CA
Core Processor
C166
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, I²C, SLDM, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
93
Program Memory Type
ROMless
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
128-LFQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
SAKC161JCLFCA
SP000057699
SP000057699
Instruction Set Summary
Table 6
The various addressing modes that can be used with a specific instruction, the operation
of the instructions, parameters for conditional execution of instructions, and the opcodes
for each instruction can be found in the “C166 Family Instruction Set Manual”.
This document also provides a detailled description of each instruction.
Table 6
Mnemonic
ADD(B)
ADDC(B)
SUB(B)
SUBC(B)
MUL(U)
DIV(U)
DIVL(U)
CPL(B)
NEG(B)
AND(B)
OR(B)
XOR(B)
BCLR
BSET
BMOV(N)
BAND, BOR,
BXOR
BCMP
BFLDH/L
CMP(B)
CMPD1/2
CMPI1/2
PRIOR
SHL / SHR
ROL / ROR
ASHR
Data Sheet
lists the instructions of the C161CS/JC/JI in a condensed way.
Instruction Set Summary
Add word (byte) operands with Carry
Subtract word (byte) operands
Subtract word (byte) operands with Carry
Negate direct word (byte) GPR
Bitwise AND, (word/byte operands)
Compare word (byte) operands
Shift left/right direct word GPR
Description
Add word (byte) operands
(Un)Signed multiply direct GPR by direct GPR (16-16-bit) 2
(Un)Signed divide register MDL by direct GPR (16-/16-bit) 2
(Un)Signed long divide reg. MD by direct GPR (32-/16-bit) 2
Complement direct word (byte) GPR
Bitwise OR, (word/byte operands)
Bitwise XOR, (word/byte operands)
Clear direct bit
Set direct bit
Move (negated) direct bit to direct bit
AND/OR/XOR direct bit with direct bit
Compare direct bit to direct bit
Bitwise modify masked high/low byte of bit-addressable
direct word memory with immediate data
Compare word data to GPR and decrement GPR by 1/2
Compare word data to GPR and increment GPR by 1/2
Determine number of shift cycles to normalize direct
word GPR and store result in direct word GPR
Rotate left/right direct word GPR
Arithmetic (sign bit) shift right direct word GPR
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