MC9S08DZ60CLF Freescale Semiconductor, MC9S08DZ60CLF Datasheet - Page 333
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MC9S08DZ60CLF
Manufacturer Part Number
MC9S08DZ60CLF
Description
IC MCU 60K FLASH 4K RAM 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Specifications of MC9S08DZ60CLF
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
For Use With
DEMO9S08DZ60 - BOARD DEMOEVB9S08DZ60 - BOARD EVAL FOR 9S08DZ60
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S08DZ60CLF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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16.3.5
These read/write registers contain the captured TPM counter value of the input capture function or the
output compare value for the output compare or PWM functions. The channel registers are cleared by
reset.
In input capture mode, reading either byte (TPMxCnVH or TPMxCnVL) latches the contents of both bytes
into a buffer where they remain latched until the other half is read. This latching mechanism also resets
Freescale Semiconductor
Reset
Reset
W
W
R
R
Bit 15
Bit 7
TPM Channel Value Registers (TPMxCnVH:TPMxCnVL)
0
0
7
7
CPWMS
0
1
Figure 16-13. TPM Channel Value Register High (TPMxCnVH)
Figure 16-14. TPM Channel Value Register Low (TPMxCnVL)
14
MSnB:MSnA
0
6
0
6
6
XX
1X
00
01
Table 16-6. Mode, Edge, and Level Selection
MC9S08DZ60 Series Data Sheet, Rev. 4
13
5
0
5
5
0
ELSnB:ELSnA
X1
X1
01
10
11
01
10
11
10
10
12
0
4
0
4
4
Output compare
Center-aligned
Input capture
Edge-aligned
Mode
PWM
PWM
11
0
3
0
3
3
Chapter 16 Timer/PWM Module (S08TPMV3)
Capture on falling edge
Capture on rising edge
Set output on compare
High-true pulses (clear
High-true pulses (clear
output on compare-up)
output on compare-up)
10
0
2
0
2
2
Low-true pulses (set
Low-true pulses (set
Capture on rising or
output on compare)
output on compare)
Toggle output on
Clear output on
Configuration
falling edge
compare
compare
only
only
1
9
0
1
1
0
Bit 8
Bit 0
0
0
0
0
333
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