MC9S08DZ60CLF Freescale Semiconductor, MC9S08DZ60CLF Datasheet - Page 134
![no-image](/images/manufacturer_photos/0/2/262/freescale_semiconductor_sml.jpg)
MC9S08DZ60CLF
Manufacturer Part Number
MC9S08DZ60CLF
Description
IC MCU 60K FLASH 4K RAM 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Specifications of MC9S08DZ60CLF
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
For Use With
DEMO9S08DZ60 - BOARD DEMOEVB9S08DZ60 - BOARD EVAL FOR 9S08DZ60
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S08DZ60CLF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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INH
IMM
DIR
EXT
DD
IX+D
Note: All Sheet 2 Opcodes are Preceded by the Page 2 Prebyte (9E)
Chapter 7 Central Processor Unit (S08CPUV3)
134
Bit-Manipulation
Inherent
Immediate
Direct
Extended
DIR to DIR
IX+ to DIR
Branch
REL
IX
IX1
IX2
IMD
DIX+
Relative
Indexed, No Offset
Indexed, 8-Bit Offset
Indexed, 16-Bit Offset
IMM to DIR
DIR to IX+
Read-Modify-Write
Table 7-3. Opcode Map (Sheet 2 of 2)
SP1
SP2
IX+
IX1+
MC9S08DZ60 Series Data Sheet, Rev. 4
9E60
3
9E61
4
9E63
3
9E64
3
9E66
3
9E67
3
9E68
3
9E69
3
9E6A
3
9E6B
4
9E6C
3
9E6D
3
9E6F
3
Stack Pointer, 8-Bit Offset
Stack Pointer, 16-Bit Offset
Indexed, No Offset with
Post Increment
Indexed, 1-Byte Offset with
Post Increment
CBEQ
DBNZ
COM
NEG
ROR
DEC
LSR
ASR
ROL
CLR
LSL
TST
INC
SP1
SP1
SP1
SP1
SP1
SP1
SP1
SP1
SP1
SP1
SP1
SP1
SP1
6
6
6
6
6
6
6
6
6
8
6
5
6
Control
Prebyte (9E) and Opcode in
9EAE
2
LDHX
Number of Bytes
IX
5
Hexadecimal
9EBE
4
LDHX
IX2
6
9ECE
3
9E60
3
LDHX
Register/Memory
NEG
SP1
IX1
Freescale Semiconductor
5
6
9ED0
4
9ED1
4
9ED2
4
9ED3
4
9ED4
4
9ED5
4
9ED6
4
9ED7
4
9ED8
4
9ED9
4
9EDA
4
9EDB
4
9EDE
4
9EDF
4
HCS08 Cycles
Instruction Mnemonic
Addressing Mode
CMP
SUB
SBC
CPX
AND
EOR
ADC
ORA
ADD
LDA
LDX
STX
STA
BIT
SP2
SP2
SP2
SP2
SP2
SP2
SP2
SP2
SP2
SP2
SP2
SP2
SP2
SP2
5
5
5
5
5
5
5
5
5
5
5
5
5
5
9EE0
3
9EE1
3
9EE2
3
9EE3
3
9EE4
3
9EE5
3
9EE6
3
9EE7
3
9EE8
3
9EE9
3
9EEA
3
9EEB
3
9EEE
3
9EEF
3
CMP
EOR
ORA
SUB
SBC
CPX
AND
ADC
ADD
LDA
STA
LDX
STX
BIT
SP1
SP1
SP1
SP1
SP1
SP1
SP1
SP1
SP1
SP1
SP1
SP1
SP1
SP1
4
4
4
4
4
4
4
4
4
4
4
4
4
4
9EF3
3
9EFE
3
9EFF
3
CPHX
LDHX
STHX
SP1
SP1
SP1
6
5
5
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