R5F21236JFP#U0 Renesas Electronics America, R5F21236JFP#U0 Datasheet - Page 418
![IC R8C/23 MCU FLASH 48LQFP](/photos/28/61/286102/48-lqfp__plqp0048kb-a_sml.jpg)
R5F21236JFP#U0
Manufacturer Part Number
R5F21236JFP#U0
Description
IC R8C/23 MCU FLASH 48LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/23r
Datasheet
1.R5F21237DFPU0.pdf
(551 pages)
Specifications of R5F21236JFP#U0
Core Processor
R8C
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
For Use With
RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F21236JFP#U0R5F21236JFP
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
R5F21236JFP#U0R5F21236JFP#U1
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
R5F21236JFP#U0R5F21236JFP#U1
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 418 of 551
- Download datasheet (6Mb)
R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
Figure 18.26
Figure 18.27
Figure 18.28
fCAN
CPU read signal
Updating period of
CAN module
CPU reset signal
C0STR register
b8: State_Reset bit
CPU read signal
Updating period of
CAN module
CPU reset signal
C0STR register
b8: State_Reset bit
CPU read signal
Updating period of
the CAN module
CPU reset signal
C0STR register
b8: State_Reset bit
0: CAN operation
1
0: CAN operation
1: CAN reset/initiall-
0: CAN operation
1: CAN reset/initiall-
: CAN reset/initial-
mode
ization mode
mode
ization mode
mode
ization mode
When Polling Period of CPU is 3fCAN or Longer
When Updating Period of CAN Module Matches Access Period from CPU
With a Wait Time of 3fCAN Before CPU Read
Page 396 of 501
Wait time
: Updated without fail in period of 3fCAN
: When the CAN module’s State_Reset bit updating period matches the CPU’s read
: When the CAN module’s State_Reset bit updating period matches the CPU’s read
: Updated without fail in period of 4fCAN
period, it does not enter reset mode, for the CPU read has the higher priority.
period, it does not enter reset mode, for the CPU read has the higher priority.
4fCAN
18. CAN Module
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