R5F21236JFP#U0 Renesas Electronics America, R5F21236JFP#U0 Datasheet - Page 390
![IC R8C/23 MCU FLASH 48LQFP](/photos/28/61/286102/48-lqfp__plqp0048kb-a_sml.jpg)
R5F21236JFP#U0
Manufacturer Part Number
R5F21236JFP#U0
Description
IC R8C/23 MCU FLASH 48LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/23r
Datasheet
1.R5F21237DFPU0.pdf
(551 pages)
Specifications of R5F21236JFP#U0
Core Processor
R8C
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
For Use With
RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Manufacturer
Quantity
Price
Part Number:
R5F21236JFP#U0R5F21236JFP
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
R5F21236JFP#U0R5F21236JFP#U1
Manufacturer:
Renesas Electronics America
Quantity:
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Part Number:
R5F21236JFP#U0R5F21236JFP#U1
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
17.5
Table 17.2
Synch Break Detection
Synch Break Generation
Completed
Synch Field Measurement
Bus Collision Detection
There are four interrupt requests that are generated by the hardware LIN: Synch Break detection, Synch Break
generation completed, Synch Field measurement, and bus collision detection. These interrupts are shared with the
timer RA interrupt.
Table 17.2 lists the Interrupt Requests of Hardware LIN.
Interrupt Request
Interrupt Requests
Interrupt Requests of Hardware LIN
Page 368 of 501
Status Flag
BCDCT
SBDCT
SFDCT
Generated when timer RA has underflowed after measuring
the low level duration of RXD0 input, or when a low-level
signal is input for a duration longer than the Synch Break
period during communication.
Generated when timer RA has completed outputting a low-
level signal to TXD0 for set period.
Generated when measurement for 8 bits of the Synch Field
by timer RA is completed.
Generated when the RXD0 input and TXD0 output values
differed at data latch timing while UART0 is enabled for
transmission.
Cause of Interrupt
17. Hardware LIN
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