MC908GR48AMFAE Freescale Semiconductor, MC908GR48AMFAE Datasheet - Page 29

• Manufacturer Part Number: MC908GR48AMFAE
• Description: IC MCU 8BIT 48K FLASH 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GR48AMFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 37
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Chapter 2
Memory
2.1 Introduction
The CPU08 can address 64 Kbytes of memory space. The memory map, shown in
2.2 Unimplemented Memory Locations
Accessing an unimplemented location can cause an illegal address reset. In the memory map
(Figure
2.3 Reserved Memory Locations
Accessing a reserved location can have unpredictable effects on microcontroller (MCU) operation. In the
Figure 2-1
or with the letter R.
2.4 Input/Output (I/O) Section
Most of the control, status, and data registers are in the zero page area of $0000–$003F, or at
$0440–$0461. Additional I/O registers have these addresses:
Data registers are shown in
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62,078 bytes of user FLASH memory
2048 bytes of random-access memory (RAM)
52 bytes of user-defined vectors
$FE00; SIM break status register, BSR
$FE01; SIM reset status register, SRSR
$FE02; reserved
$FE03; SIM break flag control register, BFCR
$FE04; interrupt status register 1, INT1
$FE05; interrupt status register 2, INT2
$FE06; interrupt status register 3, INT3
$FE07; interrupt status register 4, INT4
$FE08; FLASH-2 control register, FL2CR
$FE09; break address register high, BRKH
$FE0A; break address register low, BRKL
$FE0B; break status and control register, BRKSCR
$FE0C; LVI status register, LVISR
$FE0D; FLASH-2 test control register, FLTCR2
$FE0E; FLASH-1 test control register, FLTCR1
$FF80; FLASH-1 block protect register, FL1BPR
$FF81; FLASH-2 block protect register, FL2BPR
$FF88; FLASH-1 control register, FL1CR
2-1) and in register figures in this document, unimplemented locations are shaded.
and in register figures in this document, reserved locations are marked with the word Reserved
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
Figure
2-2.
Table 2-1
is a list of vector locations.
Figure
2-1, includes:
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