M30802FCGP#D3 Renesas Electronics America, M30802FCGP#D3 Datasheet - Page 327

IC M16C MCU FLASH 128K 144LQFP

M30802FCGP#D3

Manufacturer Part Number
M30802FCGP#D3
Description
IC M16C MCU FLASH 128K 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/80r
Datasheet

Specifications of M30802FCGP#D3

Core Processor
M16C/80
Core Size
16-Bit
Speed
20MHz
Connectivity
SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
121
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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M
R
R
e
E
1
v
J
6
1 .
Figure 32.21 Timing for page read
Figure 32.22 Timing for reading the status register
Figure 32.23 Timing for clearing the status register
0
C
9
0 .
8 /
B
0
0
Page Read Command
0
Read Status Register Command
Clear Status Register Command
1
A
This command reads the specified page (256 bytes) in the flash memory sequentially one byte at a
time. Execute the page read command as explained here following.
8
G
This command reads status information. When the “70
contents of the status register (SRD) specified with the 2nd byte and the contents of status register 1
(SRD1) specified with the 3rd byte are read.
This command clears the bits (SR3–SR5) which are set when the status register operation ends in
error. When the “50
u
7
o r
(1) Transfer the “FF
(2) Transfer addresses A
(3) From the 4th byte onward, data (D
. g
0 -
u
1
(M16C reception data)
0
A
p
0
(M16C transmit data)
, 2
23
0
2
will be output sequentially from the smallest address first in sync with the rise of the clock.
0
0
5
Page 314
(M16C reception data)
(M16C transmit data)
16
RxD1
TxD1
16
(M16C reception data)
” command code is sent with the 1st byte, the aforementioned bits are cleared.
(M16C transmit data)
” command code with the 1st byte.
f o
3
8
2
9
to A
15
FF
and A
RxD1
TxD1
16
RxD1
TxD1
0
–D
16
7
A
to A
) for the page (256 bytes) specified with addresses A
A
8
15
to
23
70
with the 2nd and 3rd bytes respectively.
16
A
50
16
A
16
16
23
” command code is sent with the 1st byte, the
to
output
SRD
data0
output
SRD1
32. Standard serial I/O mode
data255
8
to

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