M30802FCGP#D3 Renesas Electronics America, M30802FCGP#D3 Datasheet - Page 162

• Manufacturer Part Number: M30802FCGP#D3
• Description: IC M16C MCU FLASH 128K 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/80r

Specifications of M30802FCGP#D3

• Core Processor: M16C/80
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 121
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

M
R
R
e
E
1
v
J
6
Figure 18.3 Typical receive timing in UART mode
Figure 18.4 The separate CTS/RTS pins function usage
1 .
0
C
9
0 .
8 /
B
• Example of receive timing when transfer data is 8 bits long (parity disabled, one stop bit)
0
0
(a) Separate CTS/RTS pins function (UART0)
(b) Sleep mode (UART0, UART1)
0
1
RxDi
Transfer clock
Receive
complete flag
Receive interrupt
request bit
BRGi count
source
Receive enable bit
RTSi
A
With the separate CTS/RTS bit (bit 6 at address 0370
and RTS signals on different pins. (See Figure 18.4) This function is valid only for UART0. Note that
if this function is selected, the CTS/RTS function for UART1 cannot be used.
Set both CTS/RTS function select bit (bit 2 at address 036C
4 at address 036C
This mode is used to transfer data between specific microcomputers among multiple microcomputers
connected using UARTi. The sleep mode is selected when the sleep select bit (bit 7 at addresses
0360
the MSB of the received data = “1” and does not perform receive operation when the MSB = “0”.
G
8
u
7
o r
. g
0 -
u
1
_______
0
16
p
0
, 2
0
, 0368
2
_______ _______
0
0
5
_______ _______
16
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“1”
“0”
“1”
“0”
“L”
“1”
“0”
“H”
) is set to “1” during reception. In this mode, the unit performs receive operation when
The above timing applies to the following settings :
Reception triggered when transfer clock
is generated by falling edge of start bit
16
_______ _______
Microcomputer
•Parity is disabled.
•One stop bit.
•RTS function is selected.
)of UART1 to "0" and set P6
_______ _______
f o
RTS0 (P6
CTS0 (P6
R
T
X
X
3
D
D
Start bit
2
0
0
9
(P6
(P6
_______ _______
2
Sampled “L”
3
0
4
)
)
)
)
Cleared to “0” when interrupt request is accepted, or cleared by software
18. Clock asynchronous serial I/O (UART) mode
D
0
4
Receive data taken in
Transferred from UARTi receive register to
UARTi receive buffer register
to input port by the function select register.
16
) is set to “1”, the unit outputs/inputs the CTS
IN
OUT
CTS
RTS
16
D
1
) of UART1and CTS/RTS disable bit (bit
IC
D
7
Stop bit
_______ _______
_______