MC68HRC98JK3ECDW Freescale Semiconductor, MC68HRC98JK3ECDW Datasheet - Page 97

• Manufacturer Part Number: MC68HRC98JK3ECDW
• Description: IC MCU 4K FLASH 8MHZ 20-SOIC
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HRC98JK3ECDW

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 15
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.3 V
• Data Converters: A/D 12x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Connectivity: -

Chapter 9
Analog-to-Digital Converter (ADC)
9.1 Introduction
This section describes the 12-channel, 8-bit linear successive approximation analog-to-digital converter
(ADC).
9.2 Features
Features of the ADC module include:
9.3 Functional Description
Twelve ADC channels are available for sampling external sources at pins PTB0–PTB7 and PTD0–PTD3.
An analog multiplexer allows the single ADC converter to select one of the 12 ADC channels as ADC
voltage input (ADCVIN). ADCVIN is converted by the successive approximation register-based counters.
The ADC resolution is 8 bits. When the conversion is completed, ADC puts the result in the ADC data
register and sets a flag or generates an interrupt.
Freescale Semiconductor
Addr.
$003C
$003D
$003E
•
•
•
•
•
•
12 channels with multiplexed input
Linear successive approximation with monotonicity
8-bit resolution
Single or continuous conversion
Conversion complete flag or conversion complete interrupt
Selectable ADC clock
ADC Input Clock Register
ADC Status and Control
Register Name
ADC Data Register
Register (ADSCR)
(ADICLK)
(ADR)
Reset:
Reset:
Reset:
Read:
Read:
Read:
Write:
Write:
Write:
Figure 9-1. ADC I/O Register Summary
MC68HC908JL3E Family Data Sheet, Rev. 4
COCO
ADIV2
Bit 7
AD7
0
0
= Unimplemented
ADIV1
AIEN
AD6
6
0
0
Figure 9-2
ADCO
ADIV0
AD5
5
0
0
Indeterminate after reset
shows a block diagram of the ADC.
ADCH4
AD4
4
1
0
0
ADCH3
AD3
3
1
0
0
ADCH2
AD2
2
1
0
0
ADCH1
AD1
1
1
0
0
ADCH0
Bit 0
AD0
1
0
0
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