MC68HC908SR12CB Freescale Semiconductor, MC68HC908SR12CB Datasheet - Page 275

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MC68HC908SR12CB

Manufacturer Part Number
MC68HC908SR12CB
Description
IC MCU 12K FLASH 8MHZ 42-SDIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908SR12CB

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SCI
Peripherals
LVD, POR, PWM, Temp Sensor
Number Of I /o
29
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
42-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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MC68HC908SR12•MC68HC08SR12 — Rev. 5.0
Freescale Semiconductor
M — Mode (Character Length) Bit
WAKE — Wakeup Condition Bit
ILTY — Idle Line Type Bit
PEN — Parity Enable Bit
This read/write bit determines whether SCI characters are eight or
nine bits long. (See Table 16-5.) The ninth bit can serve as an extra
stop bit, as a receiver wakeup signal, or as a parity bit. Reset clears
the M bit.
This read/write bit determines which condition wakes up the SCI: a
logic 1 (address mark) in the most significant bit position of a received
character or an idle condition on the RxD pin. Reset clears the WAKE
bit.
This read/write bit determines when the SCI starts counting logic 1s
as idle character bits. The counting begins either after the start bit or
after the stop bit. If the count begins after the start bit, then a string of
logic 1s preceding the stop bit may cause false recognition of an idle
character. Beginning the count after the stop bit avoids false idle
character recognition, but requires properly synchronized
transmissions. Reset clears the ILTY bit.
This read/write bit enables the SCI parity function. (See Table 16-5.)
When enabled, the parity function inserts a parity bit in the most
significant bit position. (See Figure 16-3.) Reset clears the PEN bit.
1 = 9-bit SCI characters
0 = 8-bit SCI characters
1 = Address mark wakeup
0 = Idle line wakeup
1 = Idle character bit count begins after stop bit
0 = Idle character bit count begins after start bit
1 = Parity function enabled
0 = Parity function disabled
Serial Communications Interface (SCI)
Serial Communications Interface (SCI)
I/O Registers
Data Sheet
275

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