MC68HC908AP64CFA Freescale Semiconductor, MC68HC908AP64CFA Datasheet - Page 289
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MC68HC908AP64CFA
Manufacturer Part Number
MC68HC908AP64CFA
Description
IC MCU 64K 8MHZ SPI 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908AP8CFBE.pdf
(324 pages)
Specifications of MC68HC908AP64CFA
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SCI, SPI
Peripherals
LED, LVD, POR, PWM
Number Of I /o
32
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
For Use With
DEMO908AP64E - BOARD DEMO FOR 908AP64DEMO908AP64 - BOARD DEMO FOR 908AP64
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68HC908AP64CFA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Chapter 20
Low-Voltage Inhibit (LVI)
20.1 Introduction
This section describes the low-voltage inhibit (LVI) module. The LVI module monitors the voltage on the
V
below V
20.2 Features
Features of the LVI module include:
20.3 Functional Description
Figure 20-2
contains independent bandgap reference circuit and comparator for monitoring the V
V
low-voltage protection to external peripheral devices.
LVISTOP, LVIPWRD, LVIRSTD, and LVIREGD are in the CONFIG1 register. See
Configuration & Mask Option Registers (CONFIG & MOR)
Freescale Semiconductor
$FE0F
Addr.
DD
REG
•
•
•
•
pin and V
voltage. An LVI reset performs a MCU internal reset and drives the RST pin low to provide
Independent voltage monitoring circuits for V
Independent disable for V
Programmable LVI reset
Programmable stop mode operation
TRIPF2
Register Name
shows the structure of the LVI module. The LVI is enabled out of reset. The LVI module
LVI Status Register
REG
.
The V
guaranteed to meet operating specification as long as V
MCU operating voltage.
The LVI feature is intended to provide the safe shutdown of the
microcontroller and thus protection of related circuitry prior to any
application V
intended that users operate the microcontroller at lower than the specified
operating voltage, V
pin, and can force a reset when V
REG
(LVISR)
pin is the output of the internal voltage regulator and is
DD
Reset:
Read:
Write:
voltage collapsing completely to an unsafe level. It is not
Figure 20-1. LVI I/O Register Summary
DD
MC68HC908AP Family Data Sheet, Rev. 4
LVIOUT
DD
Bit 7
and V
0
.
REG
= Unimplemented
6
0
0
LVI circuits
NOTE
DD
DD
5
0
0
and V
voltage falls below V
for details of the LVI configuration bits. Once
REG
4
0
0
DD
3
0
0
is within the
TRIPF1
2
0
0
, or V
Chapter 3
DD
REG
voltage and the
1
0
0
voltage falls
Bit 0
0
0
287
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