MC68HC908AP64CFA Freescale Semiconductor, MC68HC908AP64CFA Datasheet - Page 269
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MC68HC908AP64CFA
Manufacturer Part Number
MC68HC908AP64CFA
Description
IC MCU 64K 8MHZ SPI 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908AP8CFBE.pdf
(324 pages)
Specifications of MC68HC908AP64CFA
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SCI, SPI
Peripherals
LED, LVD, POR, PWM
Number Of I /o
32
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
For Use With
DEMO908AP64E - BOARD DEMO FOR 908AP64DEMO908AP64 - BOARD DEMO FOR 908AP64
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68HC908AP64CFA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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When DDRCx is a logic 1, reading address $0002 reads the PTCx data latch. When DDRCx is a logic 0,
reading address $0002 reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
Table 16-4
16.5 Port D
Port D is an 8-bit special function port that shares all of its pins with the keyboard interrupt module.
16.5.1 Port D Data Register (PTD)
The port D data register contains a data latch for each of the eight port D pins.
Freescale Semiconductor
Alternative Function:
summarizes the operation of the port C pins.
1. X = don’t care.
2. Hi-Z = high impedance.
3. Writing affects data register, but does not affect input.
DDRC
Bit
0
1
Address:
Reset:
Read:
Write:
READ DDRC ($0006)
WRITE DDRC ($0006)
WRITE PTC ($0002)
READ PTC ($0002)
PTC Bit
X
X
(1)
$0003
PTD7
KBI7
Bit 7
Figure 16-12. Port D Data Register (PTD)
I/O Pin Mode
Input, Hi-Z
MC68HC908AP Family Data Sheet, Rev. 4
Table 16-4. Port C Pin Functions
RESET
Figure 16-11. Port C I/O Circuit
Output
PTD6
KBI6
6
(2)
PTD5
KBI5
5
Accesses to DDRC
DDRCx
PTCx
Read/Write
DDRC[7:0]
DDRC[7:0]
Unaffected by reset
PTD4
KBI4
4
PTD3
KBI3
3
PTC[7:0]
Read
# PTC0 has schmitt trigger input.
Pin
Accesses to PTC
PTD2
KBI2
2
PTC[7:0]
PTC[7:0]
PTD1
KBI1
Write
1
PTCx
(3)
#
PTD0
KBI0
Bit 0
Port D
267
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