MC68HC908AP64CFA Freescale Semiconductor, MC68HC908AP64CFA Datasheet - Page 261
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MC68HC908AP64CFA
Manufacturer Part Number
MC68HC908AP64CFA
Description
IC MCU 64K 8MHZ SPI 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908AP8CFBE.pdf
(324 pages)
Specifications of MC68HC908AP64CFA
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SCI, SPI
Peripherals
LED, LVD, POR, PWM
Number Of I /o
32
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
For Use With
DEMO908AP64E - BOARD DEMO FOR 908AP64DEMO908AP64 - BOARD DEMO FOR 908AP64
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68HC908AP64CFA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Chapter 16
Input/Output (I/O) Ports
16.1 Introduction
Thirty-two (32) bidirectional input-output (I/O) pins form four parallel ports. All I/O pins are programmable
as inputs or outputs.
Freescale Semiconductor
$000C
$0000
$0001
$0002
$0003
$0004
$0005
$0006
$0007
Addr.
Port C Data Register (PTC)
Port D Data Register (PTD)
Data Direction Register C
Data Direction Register D
Data Direction Register A
Data Direction Register B
Register Name
Port A Data Register
Port B Data Register
Port-A LED Control
Connect any unused I/O pins to an appropriate logic level, either V
Although the I/O ports do not require termination for proper operation,
termination reduces excess current consumption and the possibility of
electrostatic damage.
Register
(DDRC)
(DDRD)
(DDRA)
(DDRB)
(LEDA)
(PTA)
(PTB)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Figure 16-1. I/O Port Register Summary
MC68HC908AP Family Data Sheet, Rev. 4
DDRA7
DDRB7
DDRC7
DDRD7
LEDA7
PTC7
PTD7
PTA7
PTB7
Bit 7
0
0
0
0
0
DDRA6
DDRB6
DDRC6
DDRD6
LEDA6
PTC6
PTD6
PTA6
PTB6
6
0
0
0
0
0
NOTE
DDRA5
DDRB5
DDRC5
DDRD5
LEDA5
PTC5
PTD5
PTA5
PTB5
5
0
0
0
0
0
DDRA4
DDRB4
DDRC4
DDRD4
Unaffected by reset
Unaffected by reset
Unaffected by reset
Unaffected by reset
LEDA4
PTA4
PTB4
PTC4
PTD4
4
0
0
0
0
0
DDRC3
DDRD3
DDRA3
DDRB3
LEDA3
PTA3
PTB3
PTC3
PTD3
3
0
0
0
0
0
DDRC2
DDRD2
DDRA2
DDRB2
DD
LEDA2
PTA2
PTB2
PTC2
PTD2
2
0
0
0
0
0
or V
SS
DDRC1
DDRD1
.
DDRA1
DDRB1
LEDA1
PTA1
PTB1
PTC1
PTD1
1
0
0
0
0
0
DDRA0
DDRB0
DDRC0
DDRD0
LEDA0
PTA0
PTB0
PTC0
PTD0
Bit 0
0
0
0
0
0
259
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