MC68HC908AP64CB Freescale Semiconductor, MC68HC908AP64CB Datasheet - Page 127

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MC68HC908AP64CB

Manufacturer Part Number
MC68HC908AP64CB
Description
IC MCU 64K FLASH 8MHZ 42SDIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908AP64CB

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SCI, SPI
Peripherals
LED, LVD, POR, PWM
Number Of I /o
30
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
42-DIP (0.600", 15.24mm)
For Use With
DEMO908AP64E - BOARD DEMO FOR 908AP64DEMO908AP64 - BOARD DEMO FOR 908AP64
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
During the software execution, it does not consume any dedicated RAM location, the run-time heap will
extend the system stack, all other RAM location will not be affected.
The control and data bytes are described below.
8.5.1 PRGRNGE
PRGRNGE is used to program a range of FLASH locations with data loaded into the data array.
Freescale Semiconductor
Bus speed — This one byte indicates the operating bus speed of the MCU. The value of this byte
should be equal to 4 times the bus speed. E.g., for a 4MHz bus, the value is 16 ($10). This control
byte is useful where the MCU clock source is switched between the PLL clock and the crystal clock.
Data size — This one byte indicates the number of bytes in the data array that are to be
manipulated. The maximum data array size is 255. Routines EE_WRITE and EE_READ are
restricted to manipulate a data array between 7 to 15 bytes. Whereas routines ERARNGE and
MON_ERARNGE do not manipulate a data array, thus, this data size byte has no meaning.
Start address — These two bytes, high byte followed by low byte, indicate the start address of the
FLASH memory to be manipulated.
Data array — This data array contains data that are to be manipulated. Data in this array are
programmed to FLASH memory by the programming routines: PRGRNGE, MON_PRGRNGE,
EE_WRITE. For the read routines: LDRNGE and EE_READ, data is read from FLASH and stored
in this array.
Routine Description
Data Block Format
Calling Address
ADDRESS AS POINTER
FILE_PTR
Figure 8-9. Data Block Format for ROM-Resident Routines
Routine Name
Stack Used
ARRAY
DATA
MC68HC908AP Family Data Sheet, Rev. 4
Table 8-11. PRGRNGE Routine
$XXXX
PRGRNGE
Program a range of locations
$FC34
15 bytes
Bus speed (BUS_SPD)
Data size (DATASIZE)
Start address high (ADDRH)
Start address (ADDRL)
Data 1 (DATA1)
Data N (DATAN)
:
START ADDRESS HIGH (ADDRH)
START ADDRESS LOW (ADDRL)
BUS SPEED (BUS_SPD)
DATA SIZE (DATASIZE)
R
DATA N
DATA 0
DATA 1
A
M
BLOCK
DATA
ROM-Resident Routines
127

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