MC68HC908MR8CP Freescale Semiconductor, MC68HC908MR8CP Datasheet - Page 208

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MC68HC908MR8CP

Manufacturer Part Number
MC68HC908MR8CP
Description
IC MCU 8K FLASH 8MHZ PWM 28-DIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908MR8CP

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
LVD, POR, PWM
Number Of I /o
12
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC908MR8CP
Manufacturer:
FREESCALE
Quantity:
3
Timer Interface A (TIMA)
11.4.4.1 Unbuffered PWM Signal Generation
Technical Data
208
The value in the TIMA counter modulo registers and the selected
prescaler output determines the frequency of the PWM output. The
frequency of an 8-bit PWM signal is variable in 256 increments. Writing
$00FF (255) to the TIMA counter modulo registers produces a PWM
period of 256 times the internal bus clock period if the prescaler select
value is $000. See
The value in the TIMA channel registers determines the pulse width of
the PWM output. The pulse width of an 8-bit PWM signal is variable in
256 increments. Writing $0080 (128) to the TIMA channel registers
produces a duty cycle of 128/256 or 50 percent.
Any output compare channel can generate unbuffered PWM pulses as
described in
unbuffered because changing the pulse width requires writing the new
pulse width value over the value currently in the TIMA channel registers.
An unsynchronized write to the TIMA channel registers to change a
pulse width value could cause incorrect operation for up to two PWM
periods. For example, writing a new value before the counter reaches
the old value but after the counter reaches the new value prevents any
compare during that PWM period. Also, using a TIMA overflow interrupt
routine to write a new, smaller pulse width value may cause the compare
to be missed. The TIMA may pass the new value before it is written to
the TIMA channel registers.
PTBx/TCHx
OVERFLOW
11.4.4 Pulse-Width Modulation
Figure 11-3. PWM Period and Pulse Width
Timer Interface A (TIMA)
PULSE
WIDTH
11.10.1 TIMA Status and Control
PERIOD
COMPARE
OUTPUT
OVERFLOW
COMPARE
OUTPUT
(PWM). The pulses are
MC68HC908MR8 — Rev 4.1
OVERFLOW
Freescale Semiconductor
Register.
COMPARE
OUTPUT

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