MC68HC908MR8CP Freescale Semiconductor, MC68HC908MR8CP Datasheet - Page 164

• Manufacturer Part Number: MC68HC908MR8CP
• Description: IC MCU 8K FLASH 8MHZ PWM 28-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908MR8CP

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 12
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Pulse-Width Modulator for Motor Control
9.7.1 Fault Condition Input Pins
Technical Data
164
NOTE:
A logic high level on a fault pin disables the respective PWM(s)
determined by the bank and the disable mapping register. Each fault pin
incorporates a filter to assist in rejecting spurious faults. All of the
external fault pins are software-configurable to re-enable the PWMs
either with the fault pin (automatic mode) or with software (manual
mode). Each fault pin has an associated FMODE bit to control the PWM
re-enabling method. Automatic mode is selected by setting the FMODEx
bit in the fault control register. Manual mode is selected when FMODEx
is clear.
PORTC, when used as an input port, mirrors the state of the fault input
pins, as PORTC has the capability of being used as an output port.
When either pin of PORTC is set as an output, by setting its respective
PORTC data direction register bit, the respective fault pin logic is
disconnected from that pin and the fault input will be defaulted to normal
Pulse-Width Modulator for Motor Control (PWMMC)
DISABLE
DISABLE
BANK X
BANK Y
Figure 9-23. PWM Disabling Decode Scheme
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor
PWM PIN 1
PWM PIN 2
PWM PIN 3
PWM PIN 4
PWM PIN 5
PWM PIN 6
DISABLE
DISABLE
DISABLE
DISABLE
DISABLE
DISABLE