MC68HC11F1CFN4 Freescale Semiconductor, MC68HC11F1CFN4 Datasheet - Page 62

• Manufacturer Part Number: MC68HC11F1CFN4
• Description: IC MCU 512 EEPROM 4MHZ 68-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC11F1CFN4

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 30
• Program Memory Type: ROMless
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 68-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Program Memory Size: -

OCxF — Output Compare x Flag
I4/O5F — Input Capture 4/Output Compare 5 Flag
ICxF — Input Capture x Flag
TMSK2 — Timer Interrupt Mask 2
TOI — Timer Overflow Interrupt Enable
RTII — Real-Time Interrupt Enable
Bits [5:4] — See 13.2 Pulse Accumulator Registers, page 64.
Bits [3:2] — Not implemented. Reads always return zero and writes have no effect.
PR[1:0] — Timer Prescaler Select
TFLG2 — Timer Interrupt Flag 2
TOF — Timer Overflow Flag
62
RESET:
RESET:
Set each time the counter matches output compare x value.
Set by IC4 or OC5, depending on which function was enabled by I4/O5 of PACTL.
Set each time a selected active edge is detected on the ICx input line.
Bits [7:4] in TMSK2 correspond bit for bit with flag bits in TFLG2. Setting any of these bits enables the
corresponding interrupt source. TMSK2 can be written only once in the first 64 cycles out of reset in
normal modes, or at any time in special modes.
Determines the main timer prescale factor as shown in Table 31. See Table 26 for specific frequencies.
Bits in this register indicate when certain timer system events have occurred. Coupled with the four
high-order bits of TMSK2, the bits of TFLG2 allow the timer subsystem to operate in either a polled or
interrupt driven system. Each bit of TFLG2 corresponds to a bit in TMSK2 in the same position.
Bits in TFLG2 are cleared by writing a one to the corresponding bit positions.
Set when TCNT rolls over from $FFFF to $0000.
0 = Timer overflow interrupt disabled
1 = Interrupt requested when TOF is set
0 = Real-time interrupt disabled
1 = Interrupt requested when RTIF is set
Bit 7
Bit 7
TOF
TOI
0
0
RTIF
RTII
6
0
6
0
Freescale Semiconductor, Inc.
For More Information On This Product,
Table 31 Main Timer Prescale Control
PAOVF
PAOVI
5
0
5
0
PR[1:0]
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0 0
0 1
1 0
1 1
PAIF
PAII
4
0
4
0
3
0
0
3
0
0
Prescaler
16
1
4
8
2
0
0
2
0
0
PR1
1
0
1
0
0
MC68HC11F1/FC0
MC68HC11FTS/D
Bit 0
PR0
Bit 0
0
0
0
$x024
$x025