MC68HC705P6ACP Freescale Semiconductor, MC68HC705P6ACP Datasheet - Page 13

• Manufacturer Part Number: MC68HC705P6ACP
• Description: IC MCU 2.1MHZ 4.5K OTP 28-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC05r

Specifications of MC68HC705P6ACP

• Core Processor: HC05
• Core Size: 8-Bit
• Speed: 2.1MHz
• Connectivity: SIO
• Peripherals: POR, WDT
• Number Of I /o: 21
• Program Memory Size: 4.5KB (4.5K x 8)
• Program Memory Type: OTP
• Ram Size: 176 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Chapter 1
General Description
1.1 Introduction
The MC68HC705P6A is an EPROM version of the MC68HC05P6 microcontroller. It is a low-cost
combination of an M68HC05 Family microprocessor with a 4-channel, 8-bit analog-to-digital (A/D)
converter, a 16-bit timer with output compare and input capture, a serial communications port (SIOP), and
a computer operating properly (COP) watchdog timer. The M68HC05 CPU core contains 176 bytes of
RAM, 4672 bytes of user EPROM, 239 bytes of bootloader ROM, and 21 input/output (I/O) pins (20
bidirectional, 1 input-only). This device is available in either a 28-pin plastic dual in-line (PDIP) or a 28-pin
small outline integrated circuit (SOIC) package.
A functional block diagram of the MC68HC705P6A is shown in
1.2 Features
Features of the MC68HC705P6A include:
Freescale Semiconductor
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Low cost
M68HC05 core
28-pin SOIC, PDIP, or windowed DIP package
4672 bytes of user EPROM (including 48 bytes of page zero EPROM and 16 bytes of user vectors)
176 bytes of on-chip RAM
4-channel 8-bit A/D converter
SIOP serial communications port
16-bit timer with output compare and input capture
20 bidirectional I/O lines and 1 input-only line
PC0 and PC1 high-current outputs
Single-chip, bootloader, and test modes
Power-saving stop, halt, and wait modes
Static EPROM mask option register (MOR) selectable options:
–
–
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–
–
–
–
239 bytes of bootloader ROM
COP watchdog timer enable or disable
Edge-sensitive or edge- and level-sensitive external interrupt
SIOP most significant bit (MSB) or least significant bit (LSB) first
SIOP clock rates: OSC divided by 8, 16, 32, or 64
Stop instruction mode, STOP or HALT
EPROM security external lockout
Programmable keyscan (pullups/interrupts) on PA0–PA7
MC68HC705P6A Advance Information Data Sheet, Rev. 2.1
Figure
1-1.
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