MC68HC705P6ACDW Freescale Semiconductor, MC68HC705P6ACDW Datasheet - Page 41

• Manufacturer Part Number: MC68HC705P6ACDW
• Description: IC MCU 2.1MHZ 4.5K OTP 28-SOIC
• Manufacturer: Freescale Semiconductor
• Series: HC05r

Specifications of MC68HC705P6ACDW

• Core Processor: HC05
• Core Size: 8-Bit
• Speed: 2.1MHz
• Connectivity: SIO
• Peripherals: POR, WDT
• Number Of I /o: 21
• Program Memory Size: 4.5KB (4.5K x 8)
• Program Memory Type: OTP
• Ram Size: 176 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Data Bus Width: 8 bit
• Data Ram Size: 176 B
• Maximum Clock Frequency: 2.1 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 16 bit
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

Chapter 7
Serial Input/Output Port (SIOP)
7.1 Introduction
The simple synchronous serial I/O port (SIOP) subsystem is designed to provide efficient serial
communications between peripheral devices or other MCUs. The SIOP is implemented as a 3-wire
master/slave system with serial clock (SCK), serial data input (SDI), and serial data output (SDO). A block
diagram of the SIOP is shown in
is MSB or LSB first.
The SIOP subsystem shares its input/output pins with port B. When the SIOP is enabled (SPE bit set in
register SCR), port B DDR and data registers are modified by the SIOP. Although port B DDR and data
registers can be altered by application software, these actions could affect the transmitted or received
data.
Freescale Semiconductor
7 6 5 4 3 2 1 0
REGISTER
CONTROL
$0A
HCO5 INTERNAL BUS
GENERATOR
CPU CLOCK
INTERNAL
BAUD
RATE
MC68HC705P6A Advance Information Data Sheet, Rev. 2.1
Figure
Figure 7-1. SIOP Block Diagram
7 6 5 4 3 2 1 0
REGISTER
STATUS
7-1. A mask programmable option determines whether the SIOP
$0B
7 6 5 4 3 2 1 0
REGISTER
SHIFT
8-BIT
$0C
SPE
SDO
SDI
SCK
CONTROL
LOGIC
I/O
SDO/PB5
SDI/PB6
SCK/PB7
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