STR911FM44X6 STMicroelectronics, STR911FM44X6 Datasheet - Page 14

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STR911FM44X6

Manufacturer Part Number
STR911FM44X6
Description
MCU 512K FLASH 96K SRAM USB CAN
Manufacturer
STMicroelectronics
Series
STR9r
Datasheet

Specifications of STR911FM44X6

Core Processor
ARM9
Core Size
32-Bit
Speed
96MHz
Connectivity
CAN, I²C, Microwire, SPI, SSP, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
Number Of I /o
40
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 2 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-LQFP
For Use With
MCBSTR9UME - BOARD EVAL MCBSTR9 + ULINK-MEMCBSTR9U - BOARD EVAL MCBSTR9 + ULINK2MCBSTR9 - BOARD EVAL STM STR9 SERIES
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
497-5061
497-5061-2
497-5061-2
STR911FM44X6T

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Functional overview
2.10
2.10.1 Master clock sources
14/73
Clock control unit (CCU)
The CCU generates a master clock of frequency f
generates individually scaled and gated clock sources to each of the following functional blocks
within the STR91xF.
The master clock in the CCU (f
firmware control, the CPU can switch between the three CCU inputs without introducing any
glitches on the master clock output. Inputs to the CCU are:
As an option, there are a number of peripherals that do not have to receive a clock sourced
from the CCU. The USB interface can receive an external clock on pin P2.7, TIM timers TIM0/
TIM1 can receive an external clock on pin P2.4, and timers TIM2/TIM3 on pin P2.5.
CPU, f
Advanced High-performance Bus (AHB), f
Advanced Peripheral Bus (APB), f
Flash Memory Interface (FMI), f
External Memory Interface (EMI), f
UART Baud Rate Generators, f
USB, f
Main Oscillator (f
crystal connected to STR91xF pins X1_CPU and X2_CPU, or an external oscillator device
connected to pin X1_CPU.
PLL (f
clock output up to 96 MHz (programmable). By default, at power-up the master clock is
sourced from the main oscillator until the PLL is ready (locked) and then the CPU may
switch to the PLL source under firmware control. The CPU can switch back to the main
oscillator source at any time and turn off the PLL for low-power operation. The PLL is
always turned off in Sleep mode.
RTC (f
X2_RTC, or an external oscillator connected to pin X1_RTC to constantly run the real-time
clock unit. This 32.768 kHz clock source can also be used as an input to the CCU to run
the CPU in slow clock mode for reduced power.
PLL
USB
CPUCLK
RTC
). The PLL takes the 4 to 25 MHz oscillator clock as input and generates a master
). A 32.768 kHz external crystal can be connected to pins X1_RTC and
OSC
). The source for the main oscillator input is a 4 to 25 MHz external
MSTR
BAUD
) is derived from one of three clock input sources. Under
FMICLK
PCLK
BCLK
HCLK
MSTR
. From this master clock the CCU also
STR91xF

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