Z8F3201VN020EC00TR Zilog, Z8F3201VN020EC00TR Datasheet - Page 200

IC ENCORE MCU FLASH 32K 44PLCC

Z8F3201VN020EC00TR

Manufacturer Part Number
Z8F3201VN020EC00TR
Description
IC ENCORE MCU FLASH 32K 44PLCC
Manufacturer
Zilog
Series
Encore!®r
Datasheet

Specifications of Z8F3201VN020EC00TR

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
31
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
44-LCC (J-Lead)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
Z8F3201VN020EC00T

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z8F3201VN020EC00TR
Manufacturer:
Zilog
Quantity:
10 000
eZ8 CPU Instruction Set
Assembly Language Programming Introduction
PS017610-0404
The eZ8 CPU assembly language provides a means for writing an application program
without having to be concerned with actual memory addresses or machine instruction for-
mats. A program written in assembly language is called a source program. Assembly lan-
guage allows the use of symbolic addresses to identify memory locations. It also allows
mnemonic codes (opcodes and operands) to represent the instructions themselves. The
opcodes identify the instruction while the operands represent memory locations, registers,
or immediate data values.
Each assembly language program consists of a series of symbolic commands called state-
ments. Each statement can contain labels, operations, operands and comments.
Labels can be assigned to a particular instruction step in a source program. The label iden-
tifies that step in the program as an entry point for use by other instructions.
The assembly language also includes assembler directives that supplement the machine
instruction. The assembler directives, or pseudo-ops, are not translated into a machine
instruction. Rather, the pseudo-ops are interpreted as directives that control or assist the
assembly process.
The source program is processed (assembled) by the assembler to obtain a machine lan-
guage program called the object code. The object code is executed by the eZ8 CPU. An
example segment of an assembly language program is detailed in the following example.
Assembly Language Source Program Example
JP START
START:
LD R4, R7
LD 234H, #%01
; Everything after the semicolon is a comment.
; A label called “START”. The first instruction (
; example causes program execution to jump to the point within the
; program where the
; A Load (LD) instruction with two operands. The first operand,
; Working Register R4, is the destination. The second operand,
; Working Register R7, is the source. The contents of R7 is
; written into R4.
; Another Load (LD) instruction with two operands.
; The first operand, Extended Mode Register Address
; identifies the destination. The second operand, Immediate Data
Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x
START
label occurs.
eZ8 CPU Instruction Set
JP START
234H
Z8 Encore!
) in this
,
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182

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