LH79524N0F100A1,55 NXP Semiconductors, LH79524N0F100A1,55 Datasheet - Page 9

• Manufacturer Part Number: LH79524N0F100A1,55
• Description: IC ARM7 BLUESTREAK MCU 208LFBGA
• Manufacturer: NXP Semiconductors
• Series: BlueStreak ; LH7r

Specifications of LH79524N0F100A1,55

• Core Processor: ARM7
• Core Size: 32-Bit
• Speed: 76.2MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.7 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-LFBGA
• For Use With: SDK-LH79524-10-3216R - KIT DEVELOPMENT ZOOM SDK LH79524460-3474 - KIT DEV ZOOM STARTER FOR LH79524568-4305 - BOARD EVAL FOR LH79524
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: 568-4272; 935285053551; LH79524N0F100A1-S

System-on-Chip
Preliminary data sheet
E5, H13,
D10, F4,
G13, H4,
E12, G8,
D9, F13,
K13, L4,
H10, J7,
J10, K8,
N9, N10
LFBGA
J13, N4
G9, H7,
H8, H9,
D5, E4,
D7, D8,
N6, N8,
K9, M5
J4, K4,
J8, J9,
P11
C16
C15
D16
D15
E16
E15
PIN
F16
F15
G4,
H1
D2
R3
N5
D1
K1
P4
T3
T1
P3
T2
E3
J2
J1
PN3/D25
nRESETIN
nRESETOUT
XTALIN
XTALOUT
XTAL32IN
XTAL32OUT
CLKOUT
nTRST
TMS
TCK
TDI
TDO
TEST1
TEST2
LINREGEN
VDDC
VSSC
VDD
VSS
VDDA0
VDDA1
VDDA2
VSSA0
VSSA1
VSSA2
SIGNAL NAME
Ground
Ground
Ground
Ground
Ground
Power Core Power Supply
Power Input/Output Power Supply
Power Analog Power Supply for Analog-to-Digital Converter
Power Analog Power Supply for the USB PLL
Power Analog Power Supply for System PLL
TYPE
Table 2. LH79524 Pin Descriptions (Cont’d)
I/O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
General Purpose I/O Signals — Port N3; multiplexed with Data bit D25
Reset Input
Reset Output
Crystal Input
Crystal Output
32.768 kHz Crystal Oscillator Input
32.768 kHz Crystal Oscillator Output
Clock Out (selectable from the internal bus clock or 32.768 kHz crystal)
JTAG Test Reset Input
JTAG Test Mode Select Input
JTAG Test Clock Input
JTAG Test Serial Data Input
JTAG Test Data Serial Output
Tie HIGH for Normal Operation; pull LOW to enable Embedded ICE Debugging
Tie HIGH for Normal Operation; pull HIGH to enable Embedded ICE Debugging
Linear Regulator Enable
Core GND
Input/Output GND
Analog GND for Analog-to-Digital Converter
Analog GND for the USB PLL
Analog GND for System PLL
NXP Semiconductors
Rev. 01 — 16 July 2007
DESCRIPTION
LH79524/LH79525
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