ATTINY87-15XZ Atmel, ATTINY87-15XZ Datasheet - Page 90
![MCU AVR 8K FLASH 15MZ 20-TSSOP](/photos/6/80/68045/313-20-tssop_sml.jpg)
ATTINY87-15XZ
Manufacturer Part Number
ATTINY87-15XZ
Description
MCU AVR 8K FLASH 15MZ 20-TSSOP
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet
1.ATTINY167-15MD.pdf
(283 pages)
Specifications of ATTINY87-15XZ
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Depending on the mode of operation used, the counter is cleared, incremented, or decre-
mented at each timer clock (clk
0). clk
0 can be generated from an external or internal clock
T
T
source, selected by the Clock Select bits (CS02:0). When no clock source is selected (CS02:0
= 0) the timer is stopped. However, the TCNT0 value can be accessed by the CPU, regardless
of whether clk
0 is present or not. A CPU write overrides (has priority over) all counter clear or
T
count operations.
The counting sequence is determined by the setting of the WGM01 and WGM00 bits located
in the Timer/Counter Control Register (TCCR0A). There are close connections between how
the counter behaves (counts) and how waveforms are generated on the Output Compare out-
put OC0A. For more details about advanced counting sequences and waveform generation,
see
“Modes of Operation” on page
92.
The Timer/Counter Overflow Flag (TOV0) is set according to the mode of operation selected
by the WGM01:0 bits. TOV0 can be used for generating a CPU interrupt.
10.5
Output Compare Unit
The 8-bit comparator continuously compares TCNT0 with the Output Compare Register
(OCR0A). Whenever TCNT0 equals OCR0A, the comparator signals a match. A match will set
the Output Compare Flag (OCF0A) at the next timer clock cycle. If enabled (OCIE0A = 1), the
Output Compare Flag generates an Output Compare interrupt. The OCF0A flag is automati-
cally cleared when the interrupt is executed. Alternatively, the OCF0A flag can be cleared by
software by writing a logical one to its I/O bit location. The Waveform Generator uses the
match signal to generate an output according to operating mode set by the WGM01:0 bits and
Compare Output mode (COM0A1:0) bits. The max and bottom signals are used by the Wave-
form Generator for handling the special cases of the extreme values in some modes of
operation
(“Modes of Operation” on page
92).
Figure 10-3
shows a block diagram of the Output Compare unit.
Figure 10-3. Output Compare Unit, Block Diagram
DATA BUS
OCRnx
TCNTn
=
(8-bit Comparator )
OCFnx (Int.Req.)
top
bottom
Waveform Generator
OCnx
FOCn
WGMn1:0
COMnX1:0
ATtiny87/ATtiny167
90
7728G–AVR–06/10
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