ATTINY87-15SZ Atmel, ATTINY87-15SZ Datasheet - Page 34

• Manufacturer Part Number: ATTINY87-15SZ
• Description: MCU AVR 8K FLASH 15MZ 32-SOIC
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY87-15SZ

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 16
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 20-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.3.8
34
ATtiny87/ATtiny167
Clock Monitoring
It is strongly recommended to run this sequence only once the interrupts have been disabled.
The user (code) is responsible for the correct implementation of the clock switching sequence.
Here is a “light” C-code that describes such a sequence of commands.
Warning:
In the ATtiny87/167, only one among the three external clock sources can be enabled at a
given time. Moreover, the enables of the external clock and of the external low-frequency
oscillator are shared with the asynchronous timer.
A safe system needs to monitor its clock sources. Two domains need to be monitored:
- Clock sources for peripherals,
- Clocks sources for system clock generation.
C Code Example
void ClockSwiching (unsigned char clk
#define CLOCK
#define CLOCK
#define CLOCK
#define CLOCK
unsigned char previous
}
// Disable interrupts
// Save the current system clock source
// Enable the new clock source
// Wait for clock validity
// Switch clock source
// Wait for effective switching
// Shut down unneeded clock source
// Re-enable interrupts
temp = SREG; asm ("cli");
CLKCSR = 1 << CLKCCE;
CLKCSR = CLOCK
previous
CLKSELR = ((sut << 4 ) & 0x30) | (clk
CLKCSR = 1 << CLKCCE;
CLKCSR = CLOCK
while ((CLKCSR & (1 << CLKRDY)) == 0);
CLKCSR = 1 << CLKCCE;
CLKCSR = CLOCK
while (1){
}
if (previous_clk != (clk_number & 0x0F)) {
}
SREG = temp;
CLKCSR = 1 << CLKCCE;
CLKCSR = CLOCK
if ((CLKSELR & 0x0F) == (clk
CLKSELR = previous
CLKCSR = 1 << CLKCCE;
CLKCSR = CLOCK
_
clk = CLKSELR & 0x0F;
_
_
_
_
RECOVER
ENABLE
SWITCH
DISABLE
_
_
_
RECOVER;
ENABLE;
SWITCH;
_
_
RECOVER;
DISABLE;
_
clk, temp;
0x05
0x02
0x04
0x01
_
clk;
_
number & 0x0F)) break;
_
number, unsigned char sut) {
_
number & 0x0F);
7728G–AVR–06/10