AT91SAM7X128-CU Atmel, AT91SAM7X128-CU Datasheet - Page 574
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AT91SAM7X128-CU
Manufacturer Part Number
AT91SAM7X128-CU
Description
MCU ARM 128K HS FLASH 100-TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet
1.AT91SAM7X512-AU-999.pdf
(687 pages)
Specifications of AT91SAM7X128-CU
Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
CAN, Ethernet, I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
62
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFBGA
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7X-EK - KIT EVAL FOR AT91SAM7X256/128
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM7X128-CU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
- Current page: 574 of 687
- Download datasheet (11Mb)
37.3.12
Table 37-5.
37.3.12.1
574
Pin Name
ETXCK_EREFCK
ECRS
ECOL
ERXDV
ERX0 - ERX3
ERXER
ERXCK
ETXEN
ETX0-ETX3
ETXER
AT91SAM7X512/256/128 Preliminary
Media Independent Interface
RMII Transmit and Receive Operation
Pin Configuration
The Ethernet MAC is capable of interfacing to both RMII and MII Interfaces. The RMII bit in the
EMAC_USRIO register controls the interface that is selected. When this bit is set, the RMII inter-
face is selected, else the MII interface is selected.
The MII and RMII interface are capable of both 10Mb/s and 100Mb/s data rates as described in
the IEEE 802.3u standard. The signals used by the MII and RMII interfaces are described in
Table
The intent of the RMII is to provide a reduced pin count alternative to the IEEE 802.3u MII. It
uses 2 bits for transmit (ETX0 and ETX1) and two bits for receive (ERX0 and ERX1). There is a
Transmit Enable (ETXEN), a Receive Error (ERXER), a Carrier Sense (ECRS_DV), and a 50
MHz Reference Clock (ETXCK_EREFCK) for 100Mb/s data rate.
The same signals are used internally for both the RMII and the MII operations. The RMII maps
these signals in a more pin-efficient manner. The transmit and receive bits are converted from a
4-bit parallel format to a 2-bit parallel scheme that is clocked at twice the rate. The carrier sense
and data valid signals are combined into the ECRSDV signal. This signal contains information
on carrier sense, FIFO status, and validity of the data. Transmit error bit (ETXER) and collision
detect (ECOL) are not used in RMII mode.
ERX0 - ERX3: 4-bit Receive Data
ETX0 - ETX3: 4-bit Transmit Data
37-5.
ETXEN: Transmit Enable
ETXCK: Transmit Clock
ERXCK: Receive Clock
ECOL: Collision Detect
ERXER: Receive Error
ETXER: Transmit Error
ECRS: Carrier Sense
ERXDV: Data Valid
MII
ECRSDV: Carrier Sense/Data Valid
ERX0 - ERX1: 2-bit Receive Data
ETX0 - ETX1: 2-bit Transmit Data
EREFCK: Reference Clock
ETXEN: Transmit Enable
ERXER: Receive Error
RMII
6120H–ATARM–17-Feb-09
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