AT91SAM7SE256-AU Atmel, AT91SAM7SE256-AU Datasheet - Page 129
AT91SAM7SE256-AU
Manufacturer Part Number
AT91SAM7SE256-AU
Description
IC ARM7 MCU FLASH 256K 128-LQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheets
1.AT88SC-SDK1.pdf
(90 pages)
2.AT91SAM7SE256-AU.pdf
(673 pages)
3.AT91SAM7SE32-AU.pdf
(655 pages)
Specifications of AT91SAM7SE256-AU
Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
EBI/EMI, I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
88
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-LQFP
Processor Series
AT91SAMx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SPI, TWI, USART
Maximum Clock Frequency
55 MHz
Number Of Programmable I/os
88
Number Of Timers
2
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, KSK-AT91SAM7S-PL, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM7SE-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Controller Family/series
AT91SAM7xxxxx
No. Of I/o's
88
Ram Memory Size
32KB
Cpu Speed
48MHz
No. Of Timers
3
Rohs Compliant
Yes
For Use With
AT91SAM7SE-EK - EVAL BOARD FOR AT91SAM7SEAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT91SAM7SE256-AU
Manufacturer:
ATMEL
Quantity:
165
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Table 20-17. Signal Description List (Continued)
20.3.2
6222F–ATARM–14-Jan-11
Signal Name
TST
PGMEN0
PGMEN1
TCK
TDI
TDO
TMS
Entering Serial Programming Mode
Function
Test Mode Select
Test Mode Select
Test Mode Select
JTAG TCK
JTAG Test Data In
JTAG Test Data Out
JTAG Test Mode Select
The following algorithm puts the device in Serial Programming Mode:
Note:
Table 20-18. Reset TAP Controller and Go to Select-DR-Scan
• Apply GND, VDDIO, VDDCORE, VDDFLASH and VDDPLL.
• Apply XIN clock within T
• Wait for T
• Reset the TAP controller clocking 5 TCK pulses with TMS set.
• Shift 0x2 into the IR register (IR is 4 bits long, LSB first) without going through the Run-Test-
• Shift 0x2 into the DR register (DR is 4 bits long, LSB first) without going through the Run-
• Shift 0xC into the IR register (IR is 4 bits long, LSB first) without going through the Run-Test-
Idle state.
Test-Idle state.
Idle state.
After reset, the device is clocked by the internal RC oscillator. Before clearing RDY signal, if an
external clock (> 32 kHz) is connected to XIN, then the device will switch on the external clock.
Else, XIN input is not considered. An higher frequency on XIN speeds up the programmer
handshake.
TDI
POR_RESET
Xt
X
X
X
X
X
X
.
POR_RESET
JTAG
Test
TMS
1
1
1
1
1
0
1
SAM7SE512/256/32 Preliminary
+ 32(T
Output
Type
Input
Input
Input
Input
Input
Input
TAP Controller State
Test-Logic Reset
Run-Test/Idle
Select-DR-Scan
SCLK
) if an external clock is available.
Active
Level
High
High
High
-
-
-
-
Comments
Must be connected to VDDIO.
Must be connected to VDDIO
Must be connected to VDDIO
Pulled-up input at reset
Pulled-up input at reset
Pulled-up input at reset
129
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