ATMEGA169V-8MU Atmel, ATMEGA169V-8MU Datasheet - Page 356
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ATMEGA169V-8MU
Manufacturer Part Number
ATMEGA169V-8MU
Description
IC AVR MCU 16K 8MHZ 1.8V 64-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA169V-8MU
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
For Use With
ATAVRBFLY - KIT EVALUATION AVR BUTTERFLYATSTK502 - MOD EXPANSION AVR STARTER 500
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Changes from Rev.
2514C-11/02 to Rev.
2514D-01/03
356
ATmega169/V
5. Updated the “Ordering Information” on page 346 to include the new speed
1. Added TCK frequency limit in “Programming via the JTAG Interface” on page
2. Added Chip Erase as a first step in “Programming the Flash” on page 295 and
3. Added the section “Unconnected Pins” on page 60.
4. Added tips on how to disable the OCD system in “On-chip Debug System” on
5. Corrected interrupt addresses. ADC and ANA_COMP had swapped places.
6. Improved the table in “SPI Timing Characteristics” on page 301 and removed
7. Changed “will be ignored” to “must be written to zero” for unused Z-pointer
8. Corrected “LCD Frame Complete” to “LCD Start of Frame” in the LCDCRA
9. Changed OUT to STS and IN to LDS in USI code examples, and corrected
10. Removed TOSKON and TOSCK from Table 103 on page 239, and g10 and g20
11. Changed from 4 to 16 MIPS and MHz in the device Features list.
12. Corrected Port A to Port F in “AVCC” on page 6 under “Pin Descriptions” on
13. Corrected 230.4 Mbps to 230.4 kbps in “Examples of Baud Rate Setting” on
14. Corrected placing of falling and rising XCK edges in Table 78, “UCPOL Bit
15. Removed reference to Multipurpose Oscillator Application Note, which does
16. Corrected Number of Calibrated RC Oscillator Cycles in Table 1 on page 19
17. Various minor Timer1 corrections.
grade for ATmega169L and the new 16 MHz ATmega169.
285.
“Programming the EEPROM” on page 296.
page 35.
the table in “SPI Serial Programming Characteristics” on page 285.
bits in “Performing a Page Write” on page 260.
Register description.
f
cannot be used. LDS and STS take one more cycle when executed, so f
had to be changed accordingly.
from Figure 115 on page 241 and Table 105 on page 242, because these sig-
nals do not exist in boundary scan.
page 5.
page 175.
Settings,” on page 174.
not exist.
from 8,448 to 67,584.
SCKmax
. The USI I/O Registers are in the extended I/O space, so IN and OUT
2514P–AVR–07/06
SCKmax
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