ATMEGA169V-8MU Atmel, ATMEGA169V-8MU Datasheet - Page 282
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ATMEGA169V-8MU
Manufacturer Part Number
ATMEGA169V-8MU
Description
IC AVR MCU 16K 8MHZ 1.8V 64-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA169V-8MU
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
For Use With
ATAVRBFLY - KIT EVALUATION AVR BUTTERFLYATSTK502 - MOD EXPANSION AVR STARTER 500
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Serial Programming
Algorithm
282
ATmega169/V
When writing serial data to the ATmega169, data is clocked on the rising edge of SCK.
When reading data from the ATmega169, data is clocked on the falling edge of SCK.
See Figure 129 for timing details.
To program and verify the ATmega169 in the serial programming mode, the following
sequence is recommended (See four byte instruction formats in Table 130):
1. Power-up sequence:
2. Wait for at least 20 ms and enable serial programming by sending the Program-
3. The serial programming instructions will not work if the communication is out of
4. The Flash is programmed one page at a time. The page size is found in Table
5. A: The EEPROM array is programmed one byte at a time by supplying the
6. Any memory location can be verified by using the Read instruction which returns
7. At the end of the programming session, RESET can be set high to commence
8. Power-off sequence (if needed):
Apply power between V
some systems, the programmer can not guarantee that SCK is held low during
power-up. In this case, RESET must be given a positive pulse of at least two
CPU clock cycles duration after SCK has been set to “0”.
ming Enable serial instruction to pin MOSI.
synchronization. When in sync. the second byte (0x53), will echo back when
issuing the third byte of the Programming Enable instruction. Whether the echo
is correct or not, all four bytes of the instruction must be transmitted. If the 0x53
did not echo back, give RESET a positive pulse and issue a new Programming
Enable command.
121 on page 269. The memory page is loaded one byte at a time by supplying
the 6 LSB of the address and data together with the Load Program Memory
Page instruction. To ensure correct loading of the page, the data low byte must
be loaded before data high byte is applied for a given address. The Program
Memory Page is stored by loading the Write Program Memory Page instruction
with the 7 MSB of the address. If polling
wait at least t
the serial programming interface before the Flash write operation completes can
result in incorrect programming.
address and data together with the appropriate Write instruction. An EEPROM
memory location is first automatically erased before new data is written. If polling
(
next byte (See Table 129). In a chip erased device, no 0xFFs in the data file(s)
need to be programmed.
B: The EEPROM array is programmed one page at a time. The Memory page is
loaded one byte at a time by supplying the 2 LSB of the address and data
together with the Load EEPROM Memory Page instruction. The EEPROM Mem-
ory Page is stored by loading the Write EEPROM Memory Page Instruction with
the 4 MSB of the address. When using EEPROM page access only byte loca-
tions loaded with the Load EEPROM Memory Page instruction is altered. The
remaining locations remain unchanged. If polling (
must wait at least t
chip erased device, no 0xFF in the data file(s) need to be programmed.
the content at the selected address at serial output MISO.
normal operation.
Set RESET to “1”.
Turn V
RDY/BSY) is not used, the user must wait at least t
CC
power off
WD_FLASH
WD_EEPROM
before issuing the next page. (See Table 129.) Accessing
CC
and GND while RESET and SCK are set to “0”. In
before issuing the next page (See Table 129). In a
(
RDY/BSY) is not used, the user must
RDY/BSY
WD_EEPROM
) is not used, the user
before issuing the
2514P–AVR–07/06
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