ATMEGA169V-8MU Atmel, ATMEGA169V-8MU Datasheet - Page 145
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ATMEGA169V-8MU
Manufacturer Part Number
ATMEGA169V-8MU
Description
IC AVR MCU 16K 8MHZ 1.8V 64-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA169V-8MU
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
For Use With
ATAVRBFLY - KIT EVALUATION AVR BUTTERFLYATSTK502 - MOD EXPANSION AVR STARTER 500
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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2514P–AVR–07/06
When the SPI is enabled, the data direction of the MOSI, MISO, SCK, and SS pins is
overridden according to Table 66. For more details on automatic port overrides, refer to
“Alternate Port Functions” on page 60.
Table 66. SPI Pin Overrides
Note:
The following code examples show how to initialize the SPI as a Master and how to per-
form a simple transmission. DDR_SPI in the examples must be replaced by the actual
Data Direction Register controlling the SPI pins. DD_MOSI, DD_MISO and DD_SCK
must be replaced by the actual data direction bits for these pins. E.g. if MOSI is placed
on pin PB5, replace DD_MOSI with DDB5 and DDR_SPI with DDRB.
Assembly Code Example
MOSI
MISO
SCK
Pin
SS
1. See “Alternate Functions of Port B” on page 63 for a detailed description of how to
define the direction of the user defined SPI pins.
Direction, Master SPI
User Defined
Input
User Defined
User Defined
(1)
(1)
Direction, Slave SPI
Input
User Defined
Input
Input
ATmega169/V
145
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