ATMEGA169-16AU Atmel, ATMEGA169-16AU Datasheet - Page 73
![IC AVR MCU 16K 16MHZ 5V 64TQFP](/photos/12/13/121332/313-64-tqfp_sml.jpg)
ATMEGA169-16AU
Manufacturer Part Number
ATMEGA169-16AU
Description
IC AVR MCU 16K 16MHZ 5V 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA169-16AU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
For Use With
ATAVRBFLY - KIT EVALUATION AVR BUTTERFLYATSTK502 - MOD EXPANSION AVR STARTER 500
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Manufacturer
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2514P–AVR–07/06
• TDO, ADC6 – Port F, Bit 6
ADC6, Analog to Digital Converter, Channel 6
TDO, JTAG Test Data Out: Serial output data from Instruction Register or Data Regis-
ter. When the JTAG interface is enabled, this pin can not be used as an I/O pin. In TAP
states that shift out data, the TDO pin drives actively. In other states the pin is pulled
high.
• TMS, ADC5 – Port F, Bit 5
ADC5, Analog to Digital Converter, Channel 5
TMS, JTAG Test mode Select: This pin is used for navigating through the TAP-controller
state machine. When the JTAG interface is enabled, this pin can not be used as an I/O
pin.
• TCK, ADC4 – Port F, Bit 4
ADC4, Analog to Digital Converter, Channel 4
TCK, JTAG Test Clock: JTAG operation is synchronous to TCK. When the JTAG inter-
face is enabled, this pin can not be used as an I/O pin.
• ADC3 - ADC0 – Port F, Bit 3:0
Analog to Digital Converter, Channel 3-0.
Table 43. Overriding Signals for Alternate Functions in PF7..PF4
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
PF7/ADC7/TDI
JTAGEN
1
JTAGEN
0
0
0
–
JTAGEN
0
–
ADC7 INPUT
TDI
PF6/ADC6/TDO
JTAGEN
1
JTAGEN
SHIFT_IR +
SHIFT_DR
JTAGEN
TDO
–
JTAGEN
0
–
ADC6 INPUT
.
.
.
0
PF5/ADC5/TMS
JTAGEN
1
JTAGEN
0
0
–
JTAGEN
0
–
TMS
ADC5 INPUT
ATmega169/V
PF4/ADC4/TCK
JTAGEN
1
JTAGEN
0
0
0
–
JTAGEN
0
–
TCK
ADC4 INPUT
73
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