ATMEGA169-16AU Atmel, ATMEGA169-16AU Datasheet - Page 44

IC AVR MCU 16K 16MHZ 5V 64TQFP

ATMEGA169-16AU

Manufacturer Part Number
ATMEGA169-16AU
Description
IC AVR MCU 16K 16MHZ 5V 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA169-16AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
For Use With
ATAVRBFLY - KIT EVALUATION AVR BUTTERFLYATSTK502 - MOD EXPANSION AVR STARTER 500
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA169-16AU
Manufacturer:
Atmel
Quantity:
10 000
44
ATmega169/V
• Bit 3 – WDE: Watchdog Enable
When the WDE is written to logic one, the Watchdog Timer is enabled, and if the WDE is
written to logic zero, the Watchdog Timer function is disabled. WDE can only be cleared
if the WDCE bit has logic level one. To disable an enabled Watchdog Timer, the follow-
ing procedure must be followed:
1. In the same operation, write a logic one to WDCE and WDE. A logic one must be
2. Within the next four clock cycles, write a logic 0 to WDE. This disables the
In safety level 2, it is not possible to disable the Watchdog Timer, even with the algo-
rithm described above. See “Timed Sequences for Changing the Configuration of the
Watchdog Timer” on page 45.
• Bits 2..0 – WDP2, WDP1, WDP0: Watchdog Timer Prescaler 2, 1, and 0
The WDP2, WDP1, and WDP0 bits determine the Watchdog Timer prescaling when the
Watchdog Timer is enabled. The different prescaling values and their corresponding
Timeout Periods are shown in Table 21.
Table 21. Watchdog Timer Prescale Select
Note:
WDP2
0
0
0
0
1
1
1
1
written to WDE even though it is set to one before the disable operation starts.
Watchdog.
Also see Figure 191 on page 332.
WDP1
0
0
1
1
0
0
1
1
WDP0
0
1
0
1
0
1
0
1
Oscillator Cycles
Number of WDT
1,024K cycles
2,048K cycles
128K cycles
256K cycles
512K cycles
16K cycles
32K cycles
64K cycles
Typical Time-out
at V
15.4 ms
30.8 ms
61.6 ms
0.12 s
0.25 s
0.49 s
CC
1.0 s
2.0 s
= 3.0V
Typical Time-out
at V
14.7 ms
29.3 ms
58.7 ms
2514P–AVR–07/06
0.12 s
0.23 s
0.47 s
CC
0.9 s
1.9 s
= 5.0V

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