DSPIC30F4013T-20I/ML Microchip Technology, DSPIC30F4013T-20I/ML Datasheet - Page 214

• Manufacturer Part Number: DSPIC30F4013T-20I/ML
• Description: IC DSPIC MCU/DSP 48K 44QFN
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F4013T-20I/ML

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, I²S, POR, PWM, WDT
• Number Of I /o: 30
• Program Memory Size: 48KB (16K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 13x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: DSPIC30F4013T20IM

dsPIC30F3014/4013
Oscillator Selection ........................................................... 131
Oscillator Start-up Timer
Output Compare Interrupts ................................................. 83
Output Compare Module..................................................... 81
Output Compare Operation During CPU Idle Mode............ 83
Output Compare Sleep Mode Operation............................. 83
P
Packaging Information ...................................................... 205
Peripheral Module Disable (PMD) Registers .................... 147
PICkit 1 Flash Starter Kit................................................... 161
PICSTART Plus Development Programmer ..................... 159
Pinout Descriptions ............................................................. 11
PLL Clock Timing Specifications....................................... 177
POR. See Power-on Reset.
Port Register Map for dsPIC30F3014/4013 ........................ 53
Port Write/Read Example.................................................... 52
Power Saving Modes ........................................................ 145
Power-Down Current (I
Power-up Timer
PRO MATE II Universal Device Programmer ................... 159
Program Address Space ..................................................... 23
Program and EEPROM Characteristics ............................ 174
Program Counter................................................................. 14
Programmable................................................................... 131
Programmer’s Model........................................................... 14
Programming Operations .................................................... 43
Protection Against Accidental Writes to OSCCON ........... 136
DS70138C-page 212
Control Registers ...................................................... 137
Operating Modes (Table) .......................................... 132
System Overview ...................................................... 131
Timing Characteristics .............................................. 181
Timing Requirements ................................................ 182
Register Map dsPIC30F3014...................................... 84
Register Map dsPIC30F4013...................................... 84
Timing Characteristics .............................................. 185
Timing Requirements ................................................ 185
Marking ..................................................................... 205
Idle ............................................................................ 146
Sleep......................................................................... 145
Sleep and Idle ........................................................... 131
Timing Characteristics .............................................. 181
Timing Requirements ................................................ 182
Construction ................................................................ 24
Data Access from Program Memory Using
Data Access From Program Memory Using
Data Access from, Address Generation...................... 24
Data Space Window into Operation ............................ 27
Data Table Access (LS Word) .................................... 25
Data Table Access (MS Byte) ..................................... 26
Memory Map ............................................................... 23
Table Instructions
Diagram ...................................................................... 15
Algorithm for Program Flash ....................................... 43
Erasing a Row of Program Memory ............................ 43
Initiating the Programming Sequence ......................... 44
Loading Write Latches ................................................ 44
Phase Locked Loop (PLL) ................................ 135
Start-up Timer (OST) ........................................ 134
Program Space Visibility ..................................... 26
Table Instructions................................................ 25
TBLRDH.............................................................. 25
TBLRDL .............................................................. 25
TBLWTH ............................................................. 25
TBLWTL.............................................................. 25
PD
) ................................................ 169
Advance Information
R
Reset ........................................................................ 131, 141
Reset Sequence ................................................................. 57
Reset Sources
Reset Timing Characteristics............................................ 181
Reset Timing Requirements ............................................. 182
Run-Time Self-Programming (RTSP) ................................. 41
S
Simple Capture Event Mode............................................... 77
Simple OC/PWM Mode Timing Requirements ................. 186
Simple Output Compare Match Mode ................................ 82
Simple PWM Mode ............................................................. 82
Software Simulator (MPLAB SIM) .................................... 158
Software Simulator (MPLAB SIM30) ................................ 158
Software Stack Pointer, Frame Pointer .............................. 14
SPI Module ......................................................................... 85
Status Bits, Their Significance and the Initialization
Status Bits, Their Significance and the Initialization
Status Register ................................................................... 14
Symbols Used in Opcode Descriptions ............................ 150
System Integration............................................................ 131
BOR, Programmable ................................................ 143
Brown-out Reset (BOR)............................................ 131
Oscillator Start-up Timer (OST) ................................ 131
POR
POR (Power-on Reset)............................................. 141
Power-on Reset (POR)............................................. 131
Power-up Timer (PWRT) .......................................... 131
Reset Sources ............................................................ 57
Brown-out Reset (BOR).............................................. 57
Illegal Instruction Trap ................................................ 57
Trap Lockout............................................................... 57
Uninitialized W Register Trap ..................................... 57
Watchdog Time-out .................................................... 57
Buffer Operation ......................................................... 78
Hall Sensor Mode ....................................................... 78
Prescaler .................................................................... 77
Timer2 and Timer3 Selection Mode............................ 78
Input Pin Fault Protection ........................................... 82
Period ......................................................................... 83
CALL Stack Frame ..................................................... 32
Framed SPI Support ................................................... 85
Operating Function Description .................................. 85
Operation During CPU Idle Mode ............................... 87
Operation During CPU Sleep Mode............................ 87
SDOx Disable ............................................................. 85
Slave Select Synchronization ..................................... 87
SPI1 Register Map...................................................... 88
Timing Characteristics
Timing Requirements
Word and Byte Communication .................................. 85
Condition for RCON Register, Case 1 ...................... 144
Condition for RCON Register, Case 2 ...................... 144
Register Map ............................................................ 148
Operating without FSCM and PWRT................ 143
With Long Crystal Start-up Time ...................... 143
Master Mode (CKE = 0).................................... 190
Master Mode (CKE = 1).................................... 191
Slave Mode (CKE = 1).............................. 192, 193
Master Mode (CKE = 0).................................... 190
Master Mode (CKE = 1).................................... 191
Slave Mode (CKE = 0)...................................... 192
Slave Mode (CKE = 1)...................................... 194
 2004 Microchip Technology Inc.