ATAM893T-TKS Atmel, ATAM893T-TKS Datasheet - Page 27

• Manufacturer Part Number: ATAM893T-TKS
• Description: IC MON TIRE-PRESS ATARX9X SER
• Manufacturer: Atmel
• Series: MARC4r

Specifications of ATAM893T-TKS

• Core Processor: MARC4
• Core Size: 4-Bit
• Speed: 4MHz
• Connectivity: SSI (2-Wire, 3 Wire)
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: EEPROM
• Eeprom Size: 64 x 16
• Ram Size: 256 x 4
• Voltage - Supply (vcc/vdd): 1.8 V ~ 6.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 20-SOIC (5.3mm Width), 20-SO, 20-SOEIAJ
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Data Converters: -

5.2.3
4680C–4BMCU–01/05
Bi-directional Port 5
As all other bi-directional ports, this port includes a bit-wise programmable Control Register
(P5CR), which allows the individual programming of each port bit as input or output. It also
opens up the possibility of reading the pin condition when in output mode. This is a useful fea-
ture for self testing and for serial bus applications.
The port pins can also be used as external interrupt inputs (see
page
on either edge. The interrupt configuration and port direction is controlled by the Port 5 Control
Register (P5CR). An additional low resistance pull-up/-down transistor mask option provides an
internal bus pull-up for serial bus applications.
The Port 5 Data Register (P5DAT) is I/O mapped to the primary address register of address ’5’h
and the Port 5 Control Register (P5CR) to the corresponding auxiliary register. The P5CR is a
byte-wide register and is configured by writing first the low nibble and then the high nibble (see
Section 5.1 on page
Figure 5-4.
28). The interrupts (INT1 and INT6) can be masked or independently configured to trigger
I/O Bus
I/O Bus
Master reset
IN enable
Bi-directional Port 5
(Data out)
P5DATy
D
22).
S
Q
(1)
Flash options
V
DD
(1)
(1)
Switched
pull-up
(1)
(1)
pull-down
Switched
Figure 5-4
V
DD
ATAM893-D
(1)
(1)
Static
pull-up
BP5y
Static
Pull-down
V
and
DD
Figure 5-5 on
27