ATTINY13-20PJ Atmel, ATTINY13-20PJ Datasheet - Page 11

• Manufacturer Part Number: ATTINY13-20PJ
• Description: IC MCU AVR 1K 5V 20MHZ 8DIP
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY13-20PJ

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 6
• Program Memory Size: 1KB (512 x 16)
• Program Memory Type: FLASH
• Eeprom Size: 64 x 8
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Connectivity: -
• Other names: ATTINY13-24PJ; ATTINY13-24PJ

4.5
4.5.1
2535J–AVR–08/10
Stack Pointer
SPL - Stack Pointer Low.
Figure 4-3.
In the different addressing modes these address registers have functions as fixed displacement,
automatic increment, and automatic decrement (see the instruction set reference for details).
The Stack is mainly used for storing temporary data, for storing local variables and for storing
return addresses after interrupts and subroutine calls. The Stack Pointer Register always points
to the top of the Stack. Note that the Stack is implemented as growing from higher memory loca-
tions to lower memory locations. This implies that a Stack PUSH command decreases the Stack
Pointer.
The Stack Pointer points to the data SRAM Stack area where the Subroutine and Interrupt
Stacks are located. This Stack space in the data SRAM is automaticall defined to the last
address in SRAM during power on reset. The Stack Pointer must be set to point above 0x60.
The Stack Pointer is decremented by one when data is pushed onto the Stack with the PUSH
instruction, and it is decremented by two when the return address is pushed onto the Stack with
subroutine call or interrupt. The Stack Pointer is incremented by one when data is popped from
the Stack with the POP instruction, and it is incremented by two when data is popped from the
Stack with return from subroutine RET or return from interrupt RETI.
The AVR Stack Pointer is implemented as two 8-bit registers in the I/O space. The number of
bits actually used is implementation dependent. Note that the data space in some implementa-
tions of the AVR architecture is so small that only SPL is needed. In this case, the SPH Register
will not be present.
X-register
Y-register
Z-register
Bit
Read/Write
Initial Value
The X-, Y-, and Z-registers
R/W
SP7
15
7
1
15
7
R29 (0x1D)
15
7
R31 (0x1F)
15
7
R27 (0x1B)
SP6
R/W
14
6
0
SP5
R/W
13
5
0
YH
ZH
0
XH
SP4
R/W
12
4
1
SP3
R/W
11
3
1
0
0
7
R28 (0x1C)
7
R30 (0x1E)
7
R26 (0x1A)
SP2
R/W
10
2
1
SP1
R/W
9
1
1
YL
ZL
XL
0
SP0
R/W
8
0
1
SPL
11
0
0
0
0
0