DSPIC30F6011T-20I/PF Microchip Technology, DSPIC30F6011T-20I/PF Datasheet - Page 2
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DSPIC30F6011T-20I/PF
Manufacturer Part Number
DSPIC30F6011T-20I/PF
Description
IC DSPIC MCU/DSP 132K 64TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F5011T-20IPT.pdf
(34 pages)
3.DSPIC30F6010T-20IPF.pdf
(6 pages)
4.DSPIC30F6011T-20IPF.pdf
(12 pages)
5.DSPIC30F6011T-20IPF.pdf
(226 pages)
Specifications of DSPIC30F6011T-20I/PF
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
52
Program Memory Size
132KB (44K x 24)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
For Use With
XLT64PT4 - SOCKET TRAN ICE 64MQFP/TQFPAC164313 - MODULE SKT FOR PM3 64PFAC30F002 - MODULE SOCKET DSPIC30F 64TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
DSPIC30F6011T20IP
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F6011T-20I/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
dsPIC30F6011/6012/6013/6014
15. CAN SFR Reads
16. High I
17. Regulating voltage for 5V/30 MIPS Applications
18. dsPIC30F6011/6013 Code Protection
The following sections will describe the errata and work
around to these errata, where they may apply.
1. Module: Data EEPROM – Speed
DS80183D-page 2
Read operations performed on CAN module
Special Function Registers (SFR), may yield
incorrect results at operation over 20 MIPS.
Memory
This release of silicon exhibits a current draw (I
of approximately 370 mA during a Row Erase
operation performed on Program Flash memory.
For this release of silicon, applications operating
off 5 volts V
remains within 5% of 5 volts.
Addresses in the range, 0x6000 through 0xFFFF,
may not be code protected for this revision of
dsPIC30F6011 and dsPIC30F6013 silicon.
At device throughput greater than 20 MIPS for V
in the range 4.75V to 5.5V (or 10 MIPS for V
the range 3V to 3.6V), Table Read instructions
(TBLRDL/TBLRDH) and instructions that use
Program Space Visibility (PSV) do not function
correctly when reading data from Data EEPROM.
Work around
When reading data from Data EEPROM, the appli-
cation should perform a clock-switch operation to
lower the frequency of the system clock so that the
throughput is less than 20 MIPS. This may be
easily performed at any time via the Oscillator
Postscaler bits, POST (OSCCON<7:6>), that
allow the application to divide the system clock
down by a factor of 4, 16 or 64.
DD
During Row Erase of Program Flash
DD
at 30 MIPS should ensure the V
Advance Information
DD
DD
DD
DD
in
)
2. Module: CPU – Unsigned
3. Module: CPU –
EXAMPLE 1:
L0:daw.b
L1: ....
The US (CORCON<12>) bit controls whether
MAC-type DSP instructions operate in signed or
unsigned mode. The device defaults to a signed
mode on power-up (US=0).
For this revision of silicon, MAC-type DSP instruc-
tions do not function as specified in unsigned
mode (US=1). Also, for this revision, the US bit will
always read as ‘0’.
Work around
Ensure that the US bit is not set by the application.
In
multiplications, use the MCU Multiply instruction,
MUL.UU.
The Decimal Adjust instruction, DAW.b, may
improperly clear the Carry bit, C (SR<0>), when
executed.
Work around
Check the state of the Carry bit prior to executing
the DAW.b instruction. If the Carry bit is set, set the
Carry bit again after executing the DAW.b instruc-
tion. Example 1 shows how the application should
process the Carry bit during a BCD addition
operation.
.include "p30f6010.inc"
.......
mov.b
mov.b
add.b
bra
daw.b
bset.b
bra
order
#0x80, w0
#0x80, w1
w0, w1, w2 ;Perform addition
NC, L0
w2
L1
w2
SR, #C
to
DAW.b
perform
2004 Microchip Technology Inc.
;First BCD number
;Second BCD number
;If C set go to L0
;If not,do DAW and
;set the carry bit
;and exit
Instruction
unsigned
MAC
integer