DSPIC30F6011T-20I/PF Microchip Technology, DSPIC30F6011T-20I/PF Datasheet - Page 8
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DSPIC30F6011T-20I/PF
Manufacturer Part Number
DSPIC30F6011T-20I/PF
Description
IC DSPIC MCU/DSP 132K 64TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F5011T-20IPT.pdf
(34 pages)
3.DSPIC30F6010T-20IPF.pdf
(6 pages)
4.DSPIC30F6011T-20IPF.pdf
(12 pages)
5.DSPIC30F6011T-20IPF.pdf
(226 pages)
Specifications of DSPIC30F6011T-20I/PF
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
52
Program Memory Size
132KB (44K x 24)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
For Use With
XLT64PT4 - SOCKET TRAN ICE 64MQFP/TQFPAC164313 - MODULE SKT FOR PM3 64PFAC30F002 - MODULE SOCKET DSPIC30F 64TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
DSPIC30F6011T20IP
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F6011T-20I/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
dsPIC30F Family Reference Manual
12. Page 5-8, Register 5-2: NVMADR:
DS80169E-page 8
Upper Byte:
bit 15
R/W-x
On page 5-8, Register 5-2: NVMADR: Non-Volatile
Memory Address Register, bit 15-0 should be
replaced with the following: :
Non-Volatile Memory Address Register,
bit 15-0
bit 15-0
Legend:
R = Readable bit
-n = Value at POR
NVMADR<15:0>: NV Memory Write Address bits
Selects the location to program or erase in program or data Flash memory.
This register may be read or written by user. This register will contain the address of EA<15:0> of the
last table write instruction executed, until written by the user.
R/W-x
Note:
Lower Byte:
bit 7
R/W-x
The NVMADRU register function is similar to the NVMADR register and holds the upper 8
bits of the location to be programmed or erased. The value of the TBLPAG register is
automatically loaded into the NVMADRU register during a table write instruction.
R/W-x
R/W-x
NVMADR<15:8>
R/W-x
W = Writable bit
‘1’ = Bit is set
R/W-x
R/W-x
NVMADR<7:0>
R/W-x
R/W-x
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-x
R/W-x
R/W-x
2004 Microchip Technology Inc.
R/W-x
x = Bit is unknown
bit 8
R/W-x
R/W-x
bit 0