PIC18LF4539T-I/ML Microchip Technology, PIC18LF4539T-I/ML Datasheet - Page 219
![IC MCU FLASH 12KX16 EE A/D 44QFN](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC18LF4539T-I/ML
Manufacturer Part Number
PIC18LF4539T-I/ML
Description
IC MCU FLASH 12KX16 EE A/D 44QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16LF627A-IP.pdf
(8 pages)
2.PIC18F2439-ISO.pdf
(322 pages)
3.PIC18F2439-ISO.pdf
(6 pages)
Specifications of PIC18LF4539T-I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
24KB (12K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1408 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1408 B
Interface Type
I2C, SPI, AUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
32
Number Of Timers
16 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
DV164005, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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21.1
ADDLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
2002 Microchip Technology Inc.
Q Cycle Activity:
Before Instruction
After Instruction
Decode
Instruction Set
W
W
Q1
=
=
0x10
0x25
ADD literal to W
[ label ] ADDLW
0 ≤ k ≤ 255
(W) + k → W
N, OV, C, DC, Z
The contents of W are added to the
8-bit literal 'k' and the result is
placed in W.
1
1
literal 'k'
ADDLW
Read
0000
Q2
0x15
1111
Process
Data
Q3
k
kkkk
Write to W
Q4
kkkk
Preliminary
ADDWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
W
REG
W
REG
Q1
=
=
=
=
register 'f'
ADD W to f
[ label ] ADDWF
0 ≤ f ≤ 255
d ∈ [0,1]
a ∈ [0,1]
(W) + (f) → dest
N, OV, C, DC, Z
Add W to register 'f'. If 'd' is 0, the
result is stored in W. If 'd' is 1, the
result is stored back in register 'f'
(default). If ‘a’ is 0, the Access
Bank will be selected. If ‘a’ is 1, the
BSR is used.
1
1
ADDWF
Read
0010
Q2
PIC18FXX39
0x17
0xC2
0xD9
0xC2
01da
REG, 0, 0
Process
Data
Q3
DS30485A-page 217
ffff
f [,d [,a]
destination
Write to
Q4
ffff
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