T89C51CC01CA-RLTIM Atmel, T89C51CC01CA-RLTIM Datasheet - Page 85
![IC 8051 MCU FLASH 32K 44VQFP](/photos/6/92/69202/313-44-vqfp_sml.jpg)
T89C51CC01CA-RLTIM
Manufacturer Part Number
T89C51CC01CA-RLTIM
Description
IC 8051 MCU FLASH 32K 44VQFP
Manufacturer
Atmel
Series
AT89C CANr
Datasheets
1.T89C51CC01CA-7CTIM.pdf
(167 pages)
2.T89C51CC01CA-7CTIM.pdf
(12 pages)
3.T89C51CC01CA-7CTIM.pdf
(32 pages)
4.T89C51CC01CA-7CTIM.pdf
(29 pages)
Specifications of T89C51CC01CA-RLTIM
Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
For Use With
AT89STK-06 - KIT DEMOBOARD 8051 MCU W/CAN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
T89C51CC01CARLTIM
Available stocks
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Manufacturer
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- T89C51CC01CA-7CTIM PDF datasheet
- T89C51CC01CA-7CTIM PDF datasheet #2
- T89C51CC01CA-7CTIM PDF datasheet #3
- T89C51CC01CA-7CTIM PDF datasheet #4
- Current page: 85 of 167
- Download datasheet (2Mb)
4129N–CAN–03/08
•
To enable an interrupt on message object error:
•
•
•
To enable an interrupt on general error:
•
•
To enable an interrupt on Buffer-full condition:
•
•
To enable an interrupt when Timer overruns:
•
When an interrupt occurs, the corresponding message object bit is set in the SIT
register.
To acknowledge an interrupt, the corresponding CANSTCH bits (RXOK, TXOK,...) or
CANGIT bits (OVRTIM, OVRBUF,...), must be cleared by the software application.
When the CAN node is in transmission and detects a Form Error in its frame, a bit Error
will also be raised. Consequently, two consecutive interrupts can occur, both due to the
same error.
When a message object error occurs and is set in CANSTCH register, no general error
are set in CANGIE register.
Enable reception interrupt, ENRX.
Enable General CAN IT in the interrupt system register,
Enable interrupt by message object, EICHi,
Enable interrupt on error, ENERCH.
Enable General CAN IT in the interrupt system register,
Enable interrupt on error, ENERG.
Enable General CAN IT in the interrupt system register,
Enable interrupt on Buffer full, ENBUF.
Enable Overrun IT in the interrupt system register.
85
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