PIC18C658-E/PT Microchip Technology, PIC18C658-E/PT Datasheet - Page 269
![IC MCU OTP 16KX16 CAN 64TQFP](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC18C658-E/PT
Manufacturer Part Number
PIC18C658-E/PT
Description
IC MCU OTP 16KX16 CAN 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16C770-ISO.pdf
(8 pages)
3.PIC18C658-IPT.pdf
(366 pages)
4.PIC18C658-IPT.pdf
(16 pages)
5.PIC18C658-IPT.pdf
(16 pages)
6.PIC18C658-IPT.pdf
(16 pages)
Specifications of PIC18C658-E/PT
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
52
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
64-TFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
PIC18C658E/PT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18C658-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC16C770-ISO PDF datasheet #2
- PIC18C658-IPT PDF datasheet #3
- PIC18C658-IPT PDF datasheet #4
- PIC18C658-IPT PDF datasheet #5
- PIC18C658-IPT PDF datasheet #6
- Current page: 269 of 366
- Download datasheet (7Mb)
ANDWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
2000 Microchip Technology Inc.
Before Instruction
After Instruction
Decode
WREG
REG
N
Z
WREG
REG
N
Z
Q1
=
=
=
=
=
=
=
=
register ’f’
AND WREG with f
[ label ] ANDWF
0
d
a
(WREG) .AND. (f)
N,Z
The contents of WREG are AND’ed
with register 'f'. If 'd' is 0, the result
is stored in WREG. If 'd' is 1, the
result is stored back in register 'f'
(default). If ’a’ is 0, the Access
Bank will be selected. If ’a’ is 1, the
bank will be selected as per the
BSR value.
1
1
ANDWF
Read
0001
Q2
0x17
0xC2
?
?
0x02
0xC2
0
0
f
[0,1]
[0,1]
255
01da
REG, W
Process
Data
Q3
ffff
f [ ,d [,a] ]
dest
Advanced Information
destination
Write to
Q4
ffff
BC
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
If Jump:
Example:
If No Jump:
Before Instruction
After Instruction
Q1
operation
Decode
Decode
PC
If Carry
If Carry
No
Q1
PC
PC
Read literal
Q2
Read literal
operation
Branch if Carry
[ label ] BC
-128
if carry bit is ’1’
None
If the Carry bit is ’1’, then the pro-
gram will branch.
The 2’s complement number ’2n’ is
added to the PC. Since the PC will
have incremented to fetch the next
instruction, the new address will be
PC+2+2n. This instruction is then
a two-cycle instruction.
1
1(2)
HERE
(PC) + 2 + 2n
1110
No
Q2
’n’
’n’
=
=
=
=
PIC18CXX8
n
address (HERE)
1;
address (HERE+12)
0;
address (HERE+2)
127
0010
Q3
operation
BC
Process
Process
Data
Data
n
No
Q3
DS30475A-page 269
5
PC
nnnn
Write to PC
Q4
operation
operation
No
No
Q4
nnnn
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