AT91M40800-33AI Atmel, AT91M40800-33AI Datasheet - Page 56

IC ARM7 MCU 100 TQFP

AT91M40800-33AI

Manufacturer Part Number
AT91M40800-33AI
Description
IC ARM7 MCU 100 TQFP
Manufacturer
Atmel
Series
AT91SAMr

Specifications of AT91M40800-33AI

Core Processor
ARM7
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, UART/USART
Peripherals
POR, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91M40800-33AI
Manufacturer:
ATMEL
Quantity:
40
Part Number:
AT91M40800-33AI
Manufacturer:
QFP
Quantity:
319
Part Number:
AT91M40800-33AI
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
AT91M40800-33AI
Manufacturer:
ATMEL
Quantity:
8 000
Part Number:
AT91M40800-33AI
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
AT91M40800-33AI SL383
Manufacturer:
Atmel
Quantity:
10 000
AIC: Advanced
Interrupt Controller
Figure 33. Interrupt Controller Block Diagram
Note:
56
After a hardware reset, the AIC pins are controlled by the PIO Controller. They must be configured to be controlled by the
peripheral before being used.
External Interrupt Sources
Internal Interrupt Sources
AT91X40 Series
Advanced Peripheral
FIQ Source
Bus (APB)
The AT91X40 Series has an 8-level priority, individually maskable, vectored interrupt
controller. This feature substantially reduces the software and real-time overhead in
handling internal and external interrupts.
The interrupt controller is connected to the NFIQ (fast interrupt request) and the NIRQ
(standard interrupt request) inputs of the ARM7TDMI processor. The processor’s NFIQ
line can only be asserted by the external fast interrupt request input: FIQ. The NIRQ line
can be asserted by the interrupts generated by the on-chip peripherals and the external
interrupt request lines: IRQ0 to IRQ2.
The 8-level priority encoder allows the customer to define the priority between the differ-
ent NIRQ interrupt sources.
Internal sources are programmed to be level sensitive or edge triggered. External
sources can be programmed to be positive or negative edge triggered or high- or low-
level sensitive.
The interrupt sources are listed in Table 8 and the AIC programmable registers in Table
9.
Memorization
Memorization
Control
Logic
Controller
Priority
Manager
Manager
NFIQ
NIRQ
NIRQ
NFIQ
ARM7TDMI
Core
1354D–ATARM–08/02

Related parts for AT91M40800-33AI