AT91M40800-33AI Atmel, AT91M40800-33AI Datasheet - Page 136

IC ARM7 MCU 100 TQFP

AT91M40800-33AI

Manufacturer Part Number
AT91M40800-33AI
Description
IC ARM7 MCU 100 TQFP
Manufacturer
Atmel
Series
AT91SAMr

Specifications of AT91M40800-33AI

Core Processor
ARM7
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, UART/USART
Peripherals
POR, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

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• LDBDIS: Counter Clock Disable with RB Loading (Code Label TC_LDBDIS)
0 = Counter clock is not disabled when RB loading occurs.
1 = Counter clock is disabled when RB loading occurs.
• ETRGEDG: External Trigger Edge Selection
• CPCTRG: RC Compare Trigger Enable (Code Label TC_CPCTRG)
0 = RC Compare has no effect on the counter and its clock.
1 = RC Compare resets the counter and starts the counter clock.
• WAVE = 0 (Code Label TC_WAVE)
0 = Capture Mode is enabled.
1 = Capture Mode is disabled (Waveform Mode is enabled).
136
ABETRG
0
1
ABETRG: TIOA or TIOB External Trigger Selection
LDRA: RA Loading Selection
LDRB: RB Loading Selection
0
0
1
1
0
0
1
1
0
0
1
1
ETRGEDG
LDRA
LDRB
AT91X40 Series
0
1
0
1
0
1
0
1
0
1
0
1
None
Rising Edge
Falling Edge
Each Edge
Edge
None
Rising edge of TIOA
Falling edge of TIOA
Each edge of TIOA
Edge
Selected ABETRG
TIOB is used as an external trigger.
TIOA is used as an external trigger.
Edge
None
Rising edge of TIOA
Falling edge of TIOA
Each edge of TIOA
TC_ETRGEDG_FALLING_EDGE
TC_ETRGEDG_RISING_EDGE
TC_LDRA_FALLING_EDGE
TC_LDRB_FALLING_EDGE
TC_ETRGEDG_EDGE_NONE
TC_ETRGEDG_BOTH_EDGE
TC_LDRB_RISING_EDGE
TC_LDRA_RISING_EDGE
TC_LDRB_EDGE_NONE
TC_LDRB_BOTH_EDGE
TC_LDRA_EDGE_NONE
TC_LDRA_BOTH_EDGE
TC_ABETRG_TIOB
TC_ABETRG_TIOA
TC_ETRGEDG
Code Label
Code Label
TC_ABETRG
Code Label
Code Label
TC_LDRB
TC_LDRA
1354D–ATARM–08/02

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