PIC16C924-08/SP Microchip Technology, PIC16C924-08/SP Datasheet - Page 20

• Manufacturer Part Number: PIC16C924-08/SP
• Description: IC MCU 64 LD 8MHZ 4K OTP 64-SDIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C924-08/SP

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI
• Peripherals: LCD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: OTP
• Ram Size: 176 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Data Converters: A/D 5x8b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 64-SDIP (0.750", 19.05mm)
• For Use With: AC164025 - MODULE SKT PROMATEII 64DIPDVA16XP640 - ADAPTER DEVICE FOR MPLAB-ICE
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Eeprom Size: -

PIC16C9XX
TABLE 4-1: SPECIAL FUNCTION REGISTER SUMMARY (Cont.’d)
DS30444E - page 20
80h
81h
82h
83h
84h
85h
86h
87h
88h
89h
8Ah
8Bh
8Ch
8Dh
8Eh
8Fh
90h
91h
92h
93h
94h
95h
96h
97h
98h
99h
9Ah
9Bh
9Ch
9Dh
9Eh
9Fh
Legend:
Note
Address Name
Bank 1
(1)
1: Registers ADRES, ADCON0, and ADCON1 are not implemented in the PIC16C923, read as '0'.
2: These bits are reserved on the PIC16C923, always maintain these bits clear.
3: These pixels do not display, but can be used as general purpose RAM.
4: PIC16C923 reset values for PORTA: --xx xxxx for a POR, and --uu uuuu for all other resets,
5: Bit1 of ADCON0 is reserved on the PIC16C924, always maintain this bit clear.
INDF
OPTION
PCL
STATUS
FSR
TRISA
TRISB
TRISC
TRISD
TRISE
PCLATH
INTCON
PIE1
PCON
PR2
SSPADD
SSPSTAT
ADCON1
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented read as '0',
shaded locations are unimplemented, read as ‘0’.
PIC16C924 reset values for PORTA: --0x 0000 when read.
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Addressing this location uses contents of FSR to address data memory (not a physical register)
Program Counter's (PC) Least Significant Byte
Indirect data memory address pointer
PORTB Data Direction Register
PORTD Data Direction Register
PORTE Data Direction Register
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Timer2 Period Register
Synchronous Serial Port (I
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
LCDIE
RBPU
Bit 7
SMP
IRP
GIE
—
—
—
—
—
INTEDG
ADIE
PEIE
Bit 6
RP1
CKE
—
—
—
—
—
(2)
PORTA Data Direction Register
PORTC Data Direction Register
2
C mode) Address Register
T0CS
Bit 5
T0IE
RP0
D/A
—
—
—
—
Write Buffer for the upper 5 bits of the PC
T0SE
INTE
Bit 4
TO
—
—
—
P
SSPIE
RBIE
Bit 3
PSA
PD
—
—
S
CCP1IE
PCFG2
Bit 2
T0IF
PS2
R/W
—
Z
TMR2IE
PCFG1
INTF
POR
Bit 1
PS1
DC
UA
TMR1IE
1997 Microchip Technology Inc.
PCFG0
RBIF
Bit 0
PS0
BF
—
C
0000 0000 0000 0000
1111 1111 1111 1111
0000 0000 0000 0000
0001 1xxx 000q quuu
xxxx xxxx uuuu uuuu
--11 1111 --11 1111
1111 1111 1111 1111
--11 1111 --11 1111
1111 1111 1111 1111
1111 1111 1111 1111
---0 0000 ---0 0000
0000 000x 0000 000u
00-- 0000 00-- 0000
---- --0- ---- --u-
1111 1111 1111 1111
0000 0000 0000 0000
0000 0000 0000 0000
---- -000
Power-on
Value on
Reset
—
—
—
—
—
—
—
—
—
—
—
—
—
—
other resets
Value on all
---- -000
—
—
—
—
—
—
—
—
—
—
—
—
—
—