PIC16C924-08/SP Microchip Technology, PIC16C924-08/SP Datasheet - Page 135
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PIC16C924-08/SP
Manufacturer Part Number
PIC16C924-08/SP
Description
IC MCU 64 LD 8MHZ 4K OTP 64-SDIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC16C923-04L.pdf
(189 pages)
4.PIC16LC924-04L.pdf
(10 pages)
Specifications of PIC16C924-08/SP
Core Processor
PIC
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI
Peripherals
LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
7KB (4K x 14)
Program Memory Type
OTP
Ram Size
176 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
64-SDIP (0.750", 19.05mm)
For Use With
AC164025 - MODULE SKT PROMATEII 64DIPDVA16XP640 - ADAPTER DEVICE FOR MPLAB-ICE
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
- PIC16F616T-ISL PDF datasheet
- PIC16F818-ISO PDF datasheet #2
- PIC16C923-04L PDF datasheet #3
- PIC16LC924-04L PDF datasheet #4
- Current page: 135 of 189
- Download datasheet (2Mb)
SUBWF
Syntax:
Operands:
Operation:
Status Affected: C, DC, Z
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example 1:
Example 2:
Example 3:
1997 Microchip Technology Inc.
Subtract W from f
[ label ]
0
d
(f) - (W)
Subtract (2’s complement method) W reg-
ister from register 'f'. If 'd' is 0 the result is
stored in the W register. If 'd' is 1 the
result is stored back in register 'f'.
1
1
SUBWF
Before Instruction
After Instruction
Before Instruction
After Instruction
Before Instruction
After Instruction
Decode
Q1
f
00
[0,1]
REG1
W
C
Z
REG1
W
C
Z
REG1
W
C
Z
REG1
W
C
Z
REG1
W
C
Z
REG1
W
C
Z
127
register 'f'
SUBWF f,d
REG1,1
destination)
0010
Read
Q2
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
3
2
?
?
1
2
1; result is positive
0
2
2
?
?
0
2
1; result is zero
1
1
2
?
?
0xFF
2
0; result is negative
0
Process
dfff
data
Q3
destination
Write to
ffff
Q4
SWAPF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example
TRIS
Operands:
Syntax:
Operation:
Status Affected: None
Encoding:
Description:
Words:
Cycles:
Example
Swap Nibbles in f
[ label ] SWAPF f,d
0
d
(f<3:0>)
(f<7:4>)
None
The upper and lower nibbles of register
'f' are exchanged. If 'd' is 0 the result is
placed in W register. If 'd' is 1 the result
is placed in register 'f'.
1
1
Before Instruction
After Instruction
Load TRIS Register
[ label ]
5
(W)
The instruction is supported for code
compatibility with the PIC16C5X prod-
ucts. Since TRIS registers are read-
able and writable, the user can directly
address them.
1
1
To maintain upward compatibility
with future PIC16CXX products, do
not use this instruction.
Decode
SWAPF REG,
Q1
00
00
f
f
[0,1]
PIC16C9XX
127
7
TRIS register f;
TRIS
register 'f'
0000
REG1
REG1
W
1110
(destination<7:4>),
(destination<3:0>)
Read
Q2
DS30444E - page 135
f
0
0110
Process
dfff
=
=
=
data
Q3
0xA5
0xA5
0x5A
0fff
destination
ffff
Write to
Q4
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