PIC16C72-10E/SP Microchip Technology, PIC16C72-10E/SP Datasheet - Page 65
![IC MCU OTP 2KX14 A/D PWM 28DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC16C72-10E/SP
Manufacturer Part Number
PIC16C72-10E/SP
Description
IC MCU OTP 2KX14 A/D PWM 28DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC16C72-04SO.pdf
(289 pages)
4.PIC16C72-04SO.pdf
(125 pages)
5.PIC16C72-04SO.pdf
(8 pages)
Specifications of PIC16C72-10E/SP
Core Processor
PIC
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
- PIC16F616T-ISL PDF datasheet
- PIC16F818-ISO PDF datasheet #2
- PIC16C72-04SO PDF datasheet #3
- PIC16C72-04SO PDF datasheet #4
- PIC16C72-04SO PDF datasheet #5
- Current page: 65 of 289
- Download datasheet (3Mb)
8.0
The Timer1 module is a 16-bit timer/counter consisting
of two 8-bit registers (TMR1H and TMR1L) which are
readable and writable. The TMR1 Register pair
(TMR1H:TMR1L) increments from 0000h to FFFFh
and rolls over to 0000h. The TMR1 Interrupt, if enabled,
is generated on overflow which is latched in interrupt
flag bit TMR1IF (PIR1<0>). This interrupt can be
enabled/disabled by setting/clearing TMR1 interrupt
enable bit TMR1IE (PIE1<0>).
Timer1 can operate in one of two modes:
• As a timer
• As a counter
The operating mode is determined by the clock select
bit, TMR1CS (T1CON<1>).
FIGURE 8-1:
1997 Microchip Technology Inc.
bit7
bit 7-6: Unimplemented: Read as '0'
bit 5-4: T1CKPS1:T1CKPS0: Timer1 Input Clock Prescale Select bits
bit 3:
bit 2:
bit 1:
bit 0:
U-0
—
TIMER1 MODULE
Applicable Devices
72 73 73A 74 74A 76 77
11 = 1:8 Prescale value
10 = 1:4 Prescale value
01 = 1:2 Prescale value
00 = 1:1 Prescale value
T1OSCEN: Timer1 Oscillator Enable Control bit
1 = Oscillator is enabled
0 = Oscillator is shut off
Note: The oscillator inverter and feedback resistor are turned off to eliminate power drain
T1SYNC: Timer1 External Clock Input Synchronization Control bit
TMR1CS = 1
1 = Do not synchronize external clock input
0 = Synchronize external clock input
TMR1CS = 0
This bit is ignored. Timer1 uses the internal clock when TMR1CS = 0.
TMR1CS: Timer1 Clock Source Select bit
1 = External clock from pin RC0/T1OSO/T1CKI (on the rising edge)
0 = Internal clock (F
TMR1ON: Timer1 On bit
1 = Enables Timer1
0 = Stops Timer1
U-0
—
T1CON: TIMER1 CONTROL REGISTER (ADDRESS 10h)
T1CKPS1 T1CKPS0 T1OSCEN T1SYNC
R/W-0
OSC
R/W-0
/4)
R/W-0
R/W-0
In timer mode, Timer1 increments every instruction
cycle. In counter mode, it increments on every rising
edge of the external clock input.
Timer1 can be enabled/disabled by setting/clearing
control bit TMR1ON (T1CON<0>).
Timer1 also has an internal “reset input”. This reset can
be generated by either of the two CCP modules
(Section 10.0). Figure 8-1 shows the Timer1 control
register.
For the PIC16C72/73A/74A/76/77, when the Timer1
oscillator is enabled (T1OSCEN is set), the RC1/
T1OSI/CCP2 and RC0/T1OSO/T1CKI pins become
inputs. That is, the TRISC<1:0> value is ignored.
For the PIC16C73/74, when the Timer1 oscillator is
enabled (T1OSCEN is set), RC1/T1OSI/CCP2 pin
becomes an input, however the RC0/T1OSO/T1CKI
pin will have to be configured as an input by setting the
TRISC<0> bit.
TMR1CS TMR1ON
R/W-0
R/W-0
bit0
R = Readable bit
W = Writable bit
U = Unimplemented bit,
- n = Value at POR reset
read as ‘0’
PIC16C7X
DS30390E-page 65
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