PIC16C72-10E/SP Microchip Technology, PIC16C72-10E/SP Datasheet - Page 151
PIC16C72-10E/SP
Manufacturer Part Number
PIC16C72-10E/SP
Description
IC MCU OTP 2KX14 A/D PWM 28DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC16C72-04SO.pdf
(289 pages)
4.PIC16C72-04SO.pdf
(125 pages)
5.PIC16C72-04SO.pdf
(8 pages)
Specifications of PIC16C72-10E/SP
Core Processor
PIC
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
- PIC16F616T-ISL PDF datasheet
- PIC16F818-ISO PDF datasheet #2
- PIC16C72-04SO PDF datasheet #3
- PIC16C72-04SO PDF datasheet #4
- PIC16C72-04SO PDF datasheet #5
- Current page: 151 of 289
- Download datasheet (3Mb)
BTFSS
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example
1997 Microchip Technology Inc.
If Skip:
Bit Test f, Skip if Set
[ label ] BTFSS f,b
0
0
skip if (f<b>) = 1
None
If bit 'b' in register 'f' is '0' then the next
instruction is executed.
If bit 'b' is '1', then the next instruction is
discarded and a NOP is executed
instead, making this a 2T
1
1(2)
Before Instruction
After Instruction
(2nd Cycle)
Operation
Decode
HERE
FALSE
TRUE
Q1
Q1
01
No-
f
b < 7
127
PC =
if FLAG<1> = 0,
PC =
if FLAG<1> = 1,
PC =
Operation
register 'f'
11bb
BTFSC
GOTO
•
•
•
Read
Q2
Q2
No-
address HERE
address FALSE
address TRUE
FLAG,1
PROCESS_CODE
Operation
Process
bfff
data
Q3
CY
Q3
No-
instruction.
Operation
Operation
ffff
Q4
Q4
No-
No-
CALL
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example
2nd Cycle
1st Cycle
Call Subroutine
[ label ] CALL k
0
(PC)+ 1
k
(PCLATH<4:3>)
None
Call Subroutine. First, return address
(PC+1) is pushed onto the stack. The
eleven bit immediate address is loaded
into PC bits <10:0>. The upper bits of
the PC are loaded from PCLATH. CALL
is a two cycle instruction.
1
2
Before Instruction
After Instruction
Operation
Decode
HERE
Q1
10
No-
k
PC<10:0>,
2047
PIC16C7X
PC = Address HERE
PC = Address THERE
TOS = Address HERE+1
Operation
Push PC
literal 'k',
to Stack
0kkk
TOS,
CALL
Read
Q2
No-
DS30390E-page 151
Operation
THERE
Process
kkkk
PC<12:11>
data
Q3
No-
Operation
kkkk
Write to
Q4
No-
PC
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