AT90S4433-8AI Atmel, AT90S4433-8AI Datasheet - Page 19

IC MCU 4K 8MHZ A/D IT 32TQFP

AT90S4433-8AI

Manufacturer Part Number
AT90S4433-8AI
Description
IC MCU 4K 8MHZ A/D IT 32TQFP
Manufacturer
Atmel
Series
AVR® 90Sr
Datasheet

Specifications of AT90S4433-8AI

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
20
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 6x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP, 32-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT90S4433-8AI
Manufacturer:
ATMEL
Quantity:
24
Part Number:
AT90S4433-8AI
Manufacturer:
ATMEL
Quantity:
30
Part Number:
AT90S4433-8AI
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Status Register – SREG
1042H–AVR–04/03
The AVR Status Register (SREG) at I/O space location $3F ($5F) is defined as:
• Bit 7 – I: Global Interrupt Enable
The Global Interrupt Enable bit must be set (one) for the interrupts to be enabled. The
individual interrupt enable control is then performed in separate control registers. If the
Global Interrupt Enable Register is cleared (zero), none of the interrupts are enabled
independent of the individual interrupt enable settings. The I-bit is cleared by hardware
after an interrupt has occurred and is set by the RETI instruction to enable subsequent
interrupts.
• Bit 6 – T: Bit Copy Storage
The Bit Copy Instructions BLD (Bit LoaD) and BST (Bit STore) use the T-bit as source
and destination for the operated bit. A bit from a register in the Register File can be cop-
ied into T by the BST instruction, and a bit in T can be copied into a bit in a register in the
Register File by the BLD instruction.
• Bit 5 – H: Half Carry Flag
The Half Carry Flag H indicates a Half Carry in some arithmetical operations. See the
Instruction Set description for detailed information.
• Bit 4 – S: Sign Bit, S = N
The S-bit is always an exclusive or between the Negative Flag N and the Two’s Comple-
ment Overflow Flag V. See the Instruction Set description for detailed information.
• Bit 3 – V: Two’s Complement Overflow Flag
The Two’s Complement Overflow Flag V supports two’s complement arithmetics. See
the Instruction Set description for detailed information.
• Bit 2 – N: Negative Flag
The Negative Flag N indicates a negative result from an arithmetical or logical operation.
See the Instruction Set description for detailed information.
• Bit 1 – Z: Zero Flag
The Zero Flag Z indicates a zero result from an arithmetical or logical operation. See the
Instruction Set description for detailed information.
• Bit 0 – C: Carry Flag
The Carry Flag C indicates a carry in an arithmetical or logical operation. See the
Instruction Set description for detailed information.
Note that the Status Register is not automatically stored when entering an interrupt rou-
tine and restored when returning from an interrupt routine. This must be handled by
software.
Bit
$3F ($5F)
Read/Write
Initial Value
R/W
7
0
I
R/W
T
6
0
V
R/W
H
5
0
R/W
S
4
0
R/W
3
V
0
R/W
N
2
0
AT90S/LS4433
R/W
1
Z
0
R/W
C
0
0
SREG
19

Related parts for AT90S4433-8AI